move sysctl's under hw.hifn; change max batching default to 1 (no batching)
based on what I learned from the Broadcom h/w
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@ -160,18 +160,20 @@ READ_REG_1(struct hifn_softc *sc, bus_size_t reg)
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}
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#define WRITE_REG_1(sc, reg, val) hifn_write_reg_1(sc, reg, val)
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SYSCTL_NODE(_hw, OID_AUTO, hifn, CTLFLAG_RD, 0, "Hifn driver parameters");
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#ifdef HIFN_DEBUG
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static int hifn_debug = 0;
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SYSCTL_INT(_debug, OID_AUTO, hifn, CTLFLAG_RW, &hifn_debug,
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0, "Hifn driver debugging printfs");
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SYSCTL_INT(_hw_hifn, OID_AUTO, debug, CTLFLAG_RW, &hifn_debug,
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0, "control debugging msgs");
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#endif
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static struct hifn_stats hifnstats;
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SYSCTL_STRUCT(_kern, OID_AUTO, hifn_stats, CTLFLAG_RD, &hifnstats,
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hifn_stats, "Hifn driver statistics");
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static int hifn_maxbatch = 2; /* XXX tune based on part+sys speed */
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SYSCTL_INT(_kern, OID_AUTO, hifn_maxbatch, CTLFLAG_RW, &hifn_maxbatch,
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0, "Hifn driver: max ops to batch w/o interrupt");
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SYSCTL_STRUCT(_hw_hifn, OID_AUTO, stats, CTLFLAG_RD, &hifnstats,
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hifn_stats, "driver statistics");
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static int hifn_maxbatch = 1;
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SYSCTL_INT(_hw_hifn, OID_AUTO, maxbatch, CTLFLAG_RW, &hifn_maxbatch,
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0, "max ops to batch w/o interrupt");
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/*
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* Probe for a supported device. The PCI vendor and device
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