Add support for Allwinner A31/A31s EHCI controller and USB PHY.
Reviewed by: andrew, Emmanuel Vadot <manu@bidouilliste.com> Approved by: gonzo (mentor) Differential Revision: https://reviews.freebsd.org/D5467
This commit is contained in:
Jared McNeill
parent
7b8cfe26a0
commit
1b4bd0235e
@ -40,7 +40,6 @@ __FBSDID("$FreeBSD$");
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#include <sys/condvar.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/gpio.h>
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#include <machine/bus.h>
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#include <dev/ofw/ofw_bus.h>
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@ -59,9 +58,9 @@ __FBSDID("$FreeBSD$");
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#include <dev/usb/controller/ehci.h>
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#include <dev/usb/controller/ehcireg.h>
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#include "gpio_if.h"
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#include "a10_clk.h"
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#include <arm/allwinner/allwinner_machdep.h>
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#include <arm/allwinner/a10_clk.h>
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#include <arm/allwinner/a31/a31_clk.h>
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#define EHCI_HC_DEVSTR "Allwinner Integrated USB 2.0 controller"
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@ -75,8 +74,9 @@ __FBSDID("$FreeBSD$");
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#define SW_AHB_INCRX_ALIGN (1 << 8)
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#define SW_AHB_INCR4 (1 << 9)
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#define SW_AHB_INCR8 (1 << 10)
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#define GPIO_USB1_PWR 230
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#define GPIO_USB2_PWR 227
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#define USB_CONF(d) \
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(void *)ofw_bus_search_compatible((d), compat_data)->ocd_data
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#define A10_READ_4(sc, reg) \
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bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, reg)
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@ -90,10 +90,32 @@ static device_detach_t a10_ehci_detach;
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bs_r_1_proto(reversed);
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bs_w_1_proto(reversed);
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struct aw_ehci_conf {
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int (*clk_activate)(void);
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int (*clk_deactivate)(void);
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bool sdram_init;
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};
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static const struct aw_ehci_conf a10_ehci_conf = {
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#if defined(SOC_ALLWINNER_A10) || defined(SOC_ALLWINNER_A20)
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.clk_activate = a10_clk_usb_activate,
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.clk_deactivate = a10_clk_usb_deactivate,
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#endif
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.sdram_init = true,
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};
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static const struct aw_ehci_conf a31_ehci_conf = {
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#if defined(SOC_ALLWINNER_A31) || defined(SOC_ALLWINNER_A31S)
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.clk_activate = a31_clk_ehci_activate,
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.clk_deactivate = a31_clk_ehci_deactivate,
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#endif
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};
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static struct ofw_compat_data compat_data[] = {
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{"allwinner,sun4i-a10-ehci", 1},
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{"allwinner,sun7i-a20-ehci", 1},
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{NULL, 0}
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{ "allwinner,sun4i-a10-ehci", (uintptr_t)&a10_ehci_conf },
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{ "allwinner,sun6i-a31-ehci", (uintptr_t)&a31_ehci_conf },
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{ "allwinner,sun7i-a20-ehci", (uintptr_t)&a10_ehci_conf },
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{ NULL, (uintptr_t)NULL }
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};
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static int
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@ -115,12 +137,18 @@ static int
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a10_ehci_attach(device_t self)
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{
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ehci_softc_t *sc = device_get_softc(self);
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const struct aw_ehci_conf *conf;
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bus_space_handle_t bsh;
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device_t sc_gpio_dev;
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int err;
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int rid;
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uint32_t reg_value = 0;
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conf = USB_CONF(self);
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if (conf->clk_activate == NULL) {
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device_printf(self, "clock not supported\n");
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return (ENXIO);
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}
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/* initialise some bus fields */
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sc->sc_bus.parent = self;
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sc->sc_bus.devices = sc->sc_devices;
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@ -170,13 +198,6 @@ a10_ehci_attach(device_t self)
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sprintf(sc->sc_vendor, "Allwinner");
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/* Get the GPIO device, we need this to give power to USB */
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sc_gpio_dev = devclass_get_device(devclass_find("gpio"), 0);
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if (sc_gpio_dev == NULL) {
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device_printf(self, "Error: failed to get the GPIO device\n");
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goto error;
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}
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err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
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NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl);
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if (err) {
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@ -188,15 +209,10 @@ a10_ehci_attach(device_t self)
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sc->sc_flags |= EHCI_SCFLG_DONTRESET;
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/* Enable clock for USB */
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a10_clk_usb_activate();
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/* Give power to USB */
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GPIO_PIN_SETFLAGS(sc_gpio_dev, GPIO_USB2_PWR, GPIO_PIN_OUTPUT);
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GPIO_PIN_SET(sc_gpio_dev, GPIO_USB2_PWR, GPIO_PIN_HIGH);
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/* Give power to USB */
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GPIO_PIN_SETFLAGS(sc_gpio_dev, GPIO_USB1_PWR, GPIO_PIN_OUTPUT);
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GPIO_PIN_SET(sc_gpio_dev, GPIO_USB1_PWR, GPIO_PIN_HIGH);
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if (conf->clk_activate() != 0) {
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device_printf(self, "Could not activate clock\n");
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goto error;
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}
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/* Enable passby */
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reg_value = A10_READ_4(sc, SW_USB_PMU_IRQ_ENABLE);
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@ -207,9 +223,11 @@ a10_ehci_attach(device_t self)
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A10_WRITE_4(sc, SW_USB_PMU_IRQ_ENABLE, reg_value);
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/* Configure port */
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reg_value = A10_READ_4(sc, SW_SDRAM_REG_HPCR_USB2);
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reg_value |= SW_SDRAM_BP_HPCR_ACCESS;
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A10_WRITE_4(sc, SW_SDRAM_REG_HPCR_USB2, reg_value);
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if (conf->sdram_init) {
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reg_value = A10_READ_4(sc, SW_SDRAM_REG_HPCR_USB2);
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reg_value |= SW_SDRAM_BP_HPCR_ACCESS;
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A10_WRITE_4(sc, SW_SDRAM_REG_HPCR_USB2, reg_value);
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}
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err = ehci_init(sc);
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if (!err) {
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@ -230,10 +248,13 @@ static int
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a10_ehci_detach(device_t self)
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{
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ehci_softc_t *sc = device_get_softc(self);
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const struct aw_ehci_conf *conf;
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device_t bdev;
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int err;
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uint32_t reg_value = 0;
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conf = USB_CONF(self);
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if (sc->sc_bus.bdev) {
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bdev = sc->sc_bus.bdev;
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device_detach(bdev);
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@ -269,9 +290,11 @@ a10_ehci_detach(device_t self)
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usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
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/* Disable configure port */
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reg_value = A10_READ_4(sc, SW_SDRAM_REG_HPCR_USB2);
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reg_value &= ~SW_SDRAM_BP_HPCR_ACCESS;
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A10_WRITE_4(sc, SW_SDRAM_REG_HPCR_USB2, reg_value);
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if (conf->sdram_init) {
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reg_value = A10_READ_4(sc, SW_SDRAM_REG_HPCR_USB2);
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reg_value &= ~SW_SDRAM_BP_HPCR_ACCESS;
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A10_WRITE_4(sc, SW_SDRAM_REG_HPCR_USB2, reg_value);
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}
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/* Disable passby */
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reg_value = A10_READ_4(sc, SW_USB_PMU_IRQ_ENABLE);
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@ -282,7 +305,7 @@ a10_ehci_detach(device_t self)
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A10_WRITE_4(sc, SW_USB_PMU_IRQ_ENABLE, reg_value);
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/* Disable clock for USB */
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a10_clk_usb_deactivate();
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conf->clk_deactivate();
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return (0);
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}
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@ -48,7 +48,9 @@ __FBSDID("$FreeBSD$");
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struct a31_ccm_softc {
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struct resource *res;
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struct mtx mtx;
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int pll6_enabled;
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int ehci_refcnt;
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};
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static struct a31_ccm_softc *a31_ccm_sc = NULL;
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@ -58,6 +60,9 @@ static struct a31_ccm_softc *a31_ccm_sc = NULL;
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#define ccm_write_4(sc, reg, val) \
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bus_write_4((sc)->res, (reg), (val))
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#define CCM_LOCK(sc) mtx_lock(&(sc)->mtx)
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#define CCM_UNLOCK(sc) mtx_unlock(&(sc)->mtx)
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#define PLL6_TIMEOUT 10
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static int
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@ -90,6 +95,8 @@ a31_ccm_attach(device_t dev)
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return (ENXIO);
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}
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mtx_init(&sc->mtx, "a31 ccm", NULL, MTX_DEF);
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a31_ccm_sc = sc;
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return (0);
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@ -293,3 +300,79 @@ a31_clk_i2c_activate(int devid)
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return (0);
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}
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int
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a31_clk_ehci_activate(void)
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{
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struct a31_ccm_softc *sc;
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uint32_t reg_value;
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sc = a31_ccm_sc;
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if (sc == NULL)
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return (ENXIO);
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CCM_LOCK(sc);
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if (++sc->ehci_refcnt == 1) {
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/* Enable USB PHY */
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reg_value = ccm_read_4(sc, A31_CCM_USBPHY_CLK);
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reg_value |= A31_CCM_USBPHY_CLK_GATING_USBPHY0;
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reg_value |= A31_CCM_USBPHY_CLK_GATING_USBPHY1;
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reg_value |= A31_CCM_USBPHY_CLK_GATING_USBPHY2;
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reg_value |= A31_CCM_USBPHY_CLK_USBPHY1_RST;
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reg_value |= A31_CCM_USBPHY_CLK_USBPHY2_RST;
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ccm_write_4(sc, A31_CCM_USBPHY_CLK, reg_value);
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/* Gating AHB clock for EHCI */
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reg_value = ccm_read_4(sc, A31_CCM_AHB_GATING0);
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reg_value |= A31_CCM_AHB_GATING_EHCI0;
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reg_value |= A31_CCM_AHB_GATING_EHCI1;
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ccm_write_4(sc, A31_CCM_AHB_GATING0, reg_value);
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/* De-assert reset */
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reg_value = ccm_read_4(sc, A31_CCM_AHB1_RST_REG0);
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reg_value |= A31_CCM_AHB1_RST_REG0_EHCI0;
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reg_value |= A31_CCM_AHB1_RST_REG0_EHCI1;
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ccm_write_4(sc, A31_CCM_AHB1_RST_REG0, reg_value);
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}
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CCM_UNLOCK(sc);
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return (0);
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}
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int
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a31_clk_ehci_deactivate(void)
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{
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struct a31_ccm_softc *sc;
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uint32_t reg_value;
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sc = a31_ccm_sc;
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if (sc == NULL)
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return (ENXIO);
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CCM_LOCK(sc);
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if (--sc->ehci_refcnt == 0) {
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/* Disable USB PHY */
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reg_value = ccm_read_4(sc, A31_CCM_USBPHY_CLK);
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reg_value &= ~A31_CCM_USBPHY_CLK_GATING_USBPHY0;
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reg_value &= ~A31_CCM_USBPHY_CLK_GATING_USBPHY1;
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reg_value &= ~A31_CCM_USBPHY_CLK_GATING_USBPHY2;
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reg_value &= ~A31_CCM_USBPHY_CLK_USBPHY1_RST;
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reg_value &= ~A31_CCM_USBPHY_CLK_USBPHY2_RST;
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ccm_write_4(sc, A31_CCM_USBPHY_CLK, reg_value);
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/* Gating AHB clock for EHCI */
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reg_value = ccm_read_4(sc, A31_CCM_AHB_GATING0);
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reg_value &= ~A31_CCM_AHB_GATING_EHCI0;
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reg_value &= ~A31_CCM_AHB_GATING_EHCI1;
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ccm_write_4(sc, A31_CCM_AHB_GATING0, reg_value);
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/* Assert reset */
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reg_value = ccm_read_4(sc, A31_CCM_AHB1_RST_REG0);
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reg_value &= ~A31_CCM_AHB1_RST_REG0_EHCI0;
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reg_value &= ~A31_CCM_AHB1_RST_REG0_EHCI1;
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ccm_write_4(sc, A31_CCM_AHB1_RST_REG0, reg_value);
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}
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CCM_UNLOCK(sc);
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return (0);
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}
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@ -134,8 +134,14 @@
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#define A31_CCM_PLL6_CFG_REG_LOCK (1 << 28)
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/* AHB_GATING_REG0 */
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#define A31_CCM_AHB_GATING_SDMMC0 (1 << 8)
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#define A31_CCM_AHB_GATING_OHCI2 (1 << 31)
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#define A31_CCM_AHB_GATING_OHCI1 (1 << 30)
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#define A31_CCM_AHB_GATING_OHCI0 (1 << 29)
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#define A31_CCM_AHB_GATING_EHCI1 (1 << 27)
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#define A31_CCM_AHB_GATING_EHCI0 (1 << 26)
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#define A31_CCM_AHB_GATING_USBDRD (1 << 24)
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#define A31_CCM_AHB_GATING_GMAC (1 << 17)
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#define A31_CCM_AHB_GATING_SDMMC0 (1 << 8)
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#define A31_CCM_PLL_CFG_ENABLE (1U << 31)
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#define A31_CCM_PLL_CFG_BYPASS (1U << 30)
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@ -151,6 +157,11 @@
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#define A31_CCM_APB2_GATING_TWI (1 << 0)
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/* AHB1_RST_REG0 */
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#define A31_CCM_AHB1_RST_REG0_OHCI2 (1 << 31)
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#define A31_CCM_AHB1_RST_REG0_OHCI1 (1 << 30)
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#define A31_CCM_AHB1_RST_REG0_OHCI0 (1 << 29)
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#define A31_CCM_AHB1_RST_REG0_EHCI1 (1 << 27)
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#define A31_CCM_AHB1_RST_REG0_EHCI0 (1 << 26)
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#define A31_CCM_AHB1_RST_REG0_GMAC (1 << 17)
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#define A31_CCM_AHB1_RST_REG0_SDMMC (1 << 8)
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@ -179,11 +190,24 @@
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#define A31_CCM_SD_CLK_OPHASE_CTR_SHIFT 8
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#define A31_CCM_SD_CLK_DIV_RATIO_M 0xf
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/* USB */
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#define A31_CCM_USBPHY_CLK_GATING_OHCI2 (1 << 18)
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#define A31_CCM_USBPHY_CLK_GATING_OHCI1 (1 << 17)
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#define A31_CCM_USBPHY_CLK_GATING_OHCI0 (1 << 16)
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#define A31_CCM_USBPHY_CLK_GATING_USBPHY2 (1 << 10)
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#define A31_CCM_USBPHY_CLK_GATING_USBPHY1 (1 << 9)
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#define A31_CCM_USBPHY_CLK_GATING_USBPHY0 (1 << 8)
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#define A31_CCM_USBPHY_CLK_USBPHY2_RST (1 << 2)
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#define A31_CCM_USBPHY_CLK_USBPHY1_RST (1 << 1)
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#define A31_CCM_USBPHY_CLK_USBPHY0_RST (1 << 0)
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#define A31_CCM_CLK_REF_FREQ 24000000U
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int a31_clk_gmac_activate(phandle_t);
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int a31_clk_mmc_activate(int);
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int a31_clk_mmc_cfg(int, int);
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int a31_clk_i2c_activate(int);
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int a31_clk_ehci_activate(void);
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int a31_clk_ehci_deactivate(void);
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#endif /* _A31_CLK_H_ */
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192
sys/arm/allwinner/aw_usbphy.c
Normal file
192
sys/arm/allwinner/aw_usbphy.c
Normal file
@ -0,0 +1,192 @@
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/*-
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* Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* Allwinner USB PHY
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/gpio.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include "gpio_if.h"
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#define USBPHY_NUMOFF 3
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#define GPIO_POLARITY(flags) (((flags) & 1) ? GPIO_PIN_LOW : GPIO_PIN_HIGH)
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static struct ofw_compat_data compat_data[] = {
|
||||
{ "allwinner,sun4i-a10-usb-phy", 1 },
|
||||
{ "allwinner,sun5i-a13-usb-phy", 1 },
|
||||
{ "allwinner,sun6i-a31-usb-phy", 1 },
|
||||
{ "allwinner,sun7i-a20-usb-phy", 1 },
|
||||
{ NULL, 0 }
|
||||
};
|
||||
|
||||
static int
|
||||
awusbphy_gpio_set(device_t dev, phandle_t node, const char *pname)
|
||||
{
|
||||
pcell_t gpio_prop[4];
|
||||
phandle_t gpio_node;
|
||||
device_t gpio_dev;
|
||||
uint32_t pin, flags;
|
||||
ssize_t len;
|
||||
int val;
|
||||
|
||||
len = OF_getencprop(node, pname, gpio_prop, sizeof(gpio_prop));
|
||||
if (len == -1)
|
||||
return (0);
|
||||
|
||||
if (len != sizeof(gpio_prop)) {
|
||||
device_printf(dev, "property %s length was %d, expected %d\n",
|
||||
pname, len, sizeof(gpio_prop));
|
||||
return (ENXIO);
|
||||
}
|
||||
|
||||
gpio_node = OF_node_from_xref(gpio_prop[0]);
|
||||
gpio_dev = OF_device_from_xref(gpio_prop[0]);
|
||||
if (gpio_dev == NULL) {
|
||||
device_printf(dev, "failed to get the GPIO device for %s\n",
|
||||
pname);
|
||||
return (ENOENT);
|
||||
}
|
||||
|
||||
if (GPIO_MAP_GPIOS(gpio_dev, node, gpio_node,
|
||||
sizeof(gpio_prop) / sizeof(gpio_prop[0]) - 1, gpio_prop + 1,
|
||||
&pin, &flags) != 0) {
|
||||
device_printf(dev, "failed to map the GPIO pin for %s\n",
|
||||
pname);
|
||||
return (ENXIO);
|
||||
}
|
||||
|
||||
val = GPIO_POLARITY(flags);
|
||||
|
||||
GPIO_PIN_SETFLAGS(gpio_dev, pin, GPIO_PIN_OUTPUT);
|
||||
GPIO_PIN_SET(gpio_dev, pin, val);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
awusbphy_supply_set(device_t dev, const char *pname)
|
||||
{
|
||||
phandle_t node, reg_node;
|
||||
pcell_t reg_xref;
|
||||
|
||||
node = ofw_bus_get_node(dev);
|
||||
|
||||
if (OF_getencprop(node, pname, ®_xref, sizeof(reg_xref)) == -1)
|
||||
return (0);
|
||||
|
||||
reg_node = OF_node_from_xref(reg_xref);
|
||||
|
||||
return (awusbphy_gpio_set(dev, reg_node, "gpio"));
|
||||
}
|
||||
|
||||
static int
|
||||
awusbphy_init(device_t dev)
|
||||
{
|
||||
char pname[20];
|
||||
phandle_t node;
|
||||
int error, off;
|
||||
|
||||
node = ofw_bus_get_node(dev);
|
||||
|
||||
for (off = 0; off < USBPHY_NUMOFF; off++) {
|
||||
snprintf(pname, sizeof(pname), "usb%d_id_det-gpio", off);
|
||||
error = awusbphy_gpio_set(dev, node, pname);
|
||||
if (error)
|
||||
return (error);
|
||||
|
||||
snprintf(pname, sizeof(pname), "usb%d_vbus_det-gpio", off);
|
||||
error = awusbphy_gpio_set(dev, node, pname);
|
||||
if (error)
|
||||
return (error);
|
||||
|
||||
snprintf(pname, sizeof(pname), "usb%d_vbus-supply", off);
|
||||
error = awusbphy_supply_set(dev, pname);
|
||||
if (error)
|
||||
return (error);
|
||||
}
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
awusbphy_probe(device_t dev)
|
||||
{
|
||||
if (!ofw_bus_status_okay(dev))
|
||||
return (ENXIO);
|
||||
|
||||
if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
|
||||
return (ENXIO);
|
||||
|
||||
device_set_desc(dev, "Allwinner USB PHY");
|
||||
return (BUS_PROBE_DEFAULT);
|
||||
}
|
||||
|
||||
static int
|
||||
awusbphy_attach(device_t dev)
|
||||
{
|
||||
int error;
|
||||
|
||||
error = awusbphy_init(dev);
|
||||
if (error)
|
||||
device_printf(dev, "failed to initialize USB PHY, error %d\n",
|
||||
error);
|
||||
|
||||
return (error);
|
||||
}
|
||||
|
||||
static device_method_t awusbphy_methods[] = {
|
||||
/* Device interface */
|
||||
DEVMETHOD(device_probe, awusbphy_probe),
|
||||
DEVMETHOD(device_attach, awusbphy_attach),
|
||||
|
||||
DEVMETHOD_END
|
||||
};
|
||||
|
||||
static driver_t awusbphy_driver = {
|
||||
"awusbphy",
|
||||
awusbphy_methods,
|
||||
0,
|
||||
};
|
||||
|
||||
static devclass_t awusbphy_devclass;
|
||||
|
||||
DRIVER_MODULE(awusbphy, simplebus, awusbphy_driver, awusbphy_devclass, 0, 0);
|
||||
MODULE_VERSION(awusbphy, 1);
|
||||
@ -7,6 +7,7 @@ arm/allwinner/a10_codec.c optional sound
|
||||
arm/allwinner/a10_common.c standard
|
||||
arm/allwinner/a10_dmac.c standard
|
||||
arm/allwinner/a10_ehci.c optional ehci
|
||||
arm/allwinner/aw_usbphy.c optional ehci
|
||||
arm/allwinner/a10_gpio.c optional gpio
|
||||
arm/allwinner/a10_mmc.c optional mmc
|
||||
arm/allwinner/a10_sramc.c standard
|
||||
|
||||
Loading…
Reference in New Issue
Block a user