Split the hardware type enum and the hw feature flags bits into separate
fields in the softc; they're ORed together in the ofw_compat_data. I already caught myself doing 'sc->fectype == <enum val>' without masking out the feature bits in one place, and that's sure to happen again. Glomming them together is convenient for storing them in the ofw_compat_data array, but there's no reason to keep them together in the softc.
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@ -103,12 +103,15 @@ enum {
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/*
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* Flags that describe general differences between the FEC hardware in various
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* SoCs. These are ORed into the FECTYPE enum values.
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* SoCs. These are ORed into the FECTYPE enum values in the ofw_compat_data, so
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* the low 8 bits are reserved for the type enum. In the softc, the type and
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* flags are put into separate members, so that you don't need to mask the flags
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* out of the type to compare it.
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*/
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#define FECTYPE_MASK 0x0000ffff
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#define FECFLAG_GBE (1 << 16)
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#define FECFLAG_AVB (1 << 17)
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#define FECFLAG_RACC (1 << 18)
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#define FECTYPE_MASK 0x000000ff
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#define FECFLAG_GBE (1 << 8)
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#define FECFLAG_AVB (1 << 9)
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#define FECFLAG_RACC (1 << 10)
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/*
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* Table of supported FDT compat strings and their associated FECTYPE values.
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@ -154,7 +157,8 @@ struct ffec_softc {
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void * intr_cookie[MAX_IRQ_COUNT];
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struct callout ffec_callout;
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mii_contype_t phy_conn_type;
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uintptr_t fectype;
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uint32_t fecflags;
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uint8_t fectype;
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boolean_t link_is_up;
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boolean_t is_attached;
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boolean_t is_detaching;
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@ -261,7 +265,7 @@ ffec_miigasket_setup(struct ffec_softc *sc)
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* We only need the gasket for MII and RMII connections on certain SoCs.
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*/
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switch (sc->fectype & FECTYPE_MASK)
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switch (sc->fectype)
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{
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case FECTYPE_IMX53:
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break;
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@ -762,7 +766,7 @@ ffec_setup_rxbuf(struct ffec_softc *sc, int idx, struct mbuf * m)
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int error, nsegs;
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struct bus_dma_segment seg;
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if ((sc->fectype & FECFLAG_RACC) == 0) {
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if (!(sc->fecflags & FECFLAG_RACC)) {
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/*
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* The RACC[SHIFT16] feature is not available. So, we need to
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* leave at least ETHER_ALIGN bytes free at the beginning of the
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@ -842,8 +846,7 @@ ffec_rxfinish_onebuf(struct ffec_softc *sc, int len)
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* to it? That way we'd only need to copy like 64 bytes or whatever the
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* biggest header is, instead of the whole 1530ish-byte frame.
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*/
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if (sc->fectype & FECFLAG_RACC) {
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if (sc->fecflags & FECFLAG_RACC) {
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m->m_data = mtod(m, uint8_t *) + 2;
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} else {
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src = mtod(m, uint8_t*);
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@ -1224,7 +1227,7 @@ ffec_init_locked(struct ffec_softc *sc)
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ffec_clear_stats(sc);
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WR4(sc, FEC_MIBC_REG, regval & ~FEC_MIBC_DIS);
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if (sc->fectype & FECFLAG_RACC) {
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if (sc->fecflags & FECFLAG_RACC) {
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/*
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* RACC - Receive Accelerator Function Configuration.
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*/
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@ -1460,10 +1463,11 @@ ffec_attach(device_t dev)
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struct ifnet *ifp = NULL;
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struct mbuf *m;
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void *dummy;
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uintptr_t typeflags;
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phandle_t ofw_node;
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uint32_t idx, mscr;
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int error, phynum, rid, irq;
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uint8_t eaddr[ETHER_ADDR_LEN];
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uint32_t idx, mscr;
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sc = device_get_softc(dev);
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sc->dev = dev;
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@ -1474,9 +1478,11 @@ ffec_attach(device_t dev)
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* There are differences in the implementation and features of the FEC
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* hardware on different SoCs, so figure out what type we are.
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*/
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sc->fectype = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
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typeflags = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
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sc->fectype = (uint8_t)(typeflags & FECTYPE_MASK);
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sc->fecflags = (uint32_t)(typeflags & ~FECTYPE_MASK);
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if (sc->fectype & FECFLAG_AVB) {
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if (sc->fecflags & FECFLAG_AVB) {
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sc->rxbuf_align = 64;
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sc->txbuf_align = 1;
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} else {
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@ -1670,7 +1676,7 @@ ffec_attach(device_t dev)
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* be done unconditionally for all hardware variants, but that hasn't
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* been tested.
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*/
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if (sc->fectype & FECFLAG_AVB)
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if (sc->fecflags & FECFLAG_AVB)
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WR4(sc, FEC_ECR_REG, 0);
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else
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WR4(sc, FEC_ECR_REG, FEC_ECR_RESET);
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@ -1752,7 +1758,7 @@ ffec_attach(device_t dev)
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}
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error = mii_attach(dev, &sc->miibus, ifp, ffec_media_change,
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ffec_media_status, BMSR_DEFCAPMASK, phynum, MII_OFFSET_ANY,
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(sc->fectype & FECTYPE_MVF) ? MIIF_FORCEANEG : 0);
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(sc->fecflags & FECTYPE_MVF) ? MIIF_FORCEANEG : 0);
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if (error != 0) {
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device_printf(dev, "PHY attach failed\n");
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goto out;
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