Document 64-bit arm in terms of arch name (aarch64) not machine (arm64).
Other architectures are documented in terms of the name that is displayed by 'uname -p', aka MACHINE_ARCH and TARGET_ARCH in the build system, now aarch64 matches the rest of them. PR: 220297
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@ -26,7 +26,7 @@
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.\"
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.\" $FreeBSD$
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.\"
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.Dd July 23, 2018
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.Dd August 5, 2018
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.Dt ARCH 7
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.Os
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.Sh NAME
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@ -90,13 +90,13 @@ architectures, the final release.
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.Pp
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.Bl -column -offset indent "Sy Architecture" "Sy Initial Release" "Sy Final Release"
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.It Sy Architecture Ta Sy Initial Release Ta Sy Final Release
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.It aarch64 Ta 11.0
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.It alpha Ta 3.2 Ta 6.4
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.It amd64 Ta 5.1
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.It arm Ta 6.0
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.It armeb Ta 8.0 Ta 11.x
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.It armv6 Ta 10.0
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.It armv7 Ta 12.0
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.It arm64 Ta 11.0
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.It ia64 Ta 5.0 Ta 10.x
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.It i386 Ta 1.0
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.It mips Ta 8.0
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@ -162,7 +162,7 @@ Examples are:
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.It Dv powerpc64 Ta Dv powerpc
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.It Dv mips64* Ta Dv mips*
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.El
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.Dv arm64
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.Dv aarch64
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currently does not support execution of
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.Dv armv6
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or
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@ -191,10 +191,10 @@ require only 4-byte alignment for 64-bit integers.
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Machine-dependent type sizes:
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.Bl -column -offset indent "Sy Architecture" "Sy void *" "Sy long double" "Sy time_t"
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.It Sy Architecture Ta Sy void * Ta Sy long double Ta Sy time_t
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.It aarch64 Ta 8 Ta 16 Ta 8
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.It amd64 Ta 8 Ta 16 Ta 8
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.It arm Ta 4 Ta 8 Ta 8
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.It armv6 Ta 4 Ta 8 Ta 8
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.It arm64 Ta 8 Ta 16 Ta 8
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.It i386 Ta 4 Ta 12 Ta 4
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.It mips Ta 4 Ta 8 Ta 8
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.It mipsel Ta 4 Ta 8 Ta 8
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@ -218,11 +218,11 @@ is 8 bytes on all supported architectures except i386.
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.Ss Endianness and Char Signedness
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.Bl -column -offset indent "Sy Architecture" "Sy Endianness" "Sy char Signedness"
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.It Sy Architecture Ta Sy Endianness Ta Sy char Signedness
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.It aarch64 Ta little Ta unsigned
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.It amd64 Ta little Ta signed
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.It arm Ta little Ta unsigned
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.It armv6 Ta little Ta unsigned
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.It armv7 Ta little Ta unsigned
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.It arm64 Ta little Ta unsigned
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.It i386 Ta little Ta signed
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.It mips Ta big Ta signed
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.It mipsel Ta little Ta signed
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@ -243,11 +243,11 @@ is 8 bytes on all supported architectures except i386.
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.Ss Page Size
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.Bl -column -offset indent "Sy Architecture" "Sy Page Sizes"
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.It Sy Architecture Ta Sy Page Sizes
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.It aarch64 Ta 4K, 2M, 1G
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.It amd64 Ta 4K, 2M, 1G
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.It arm Ta 4K
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.It armv6 Ta 4K, 1M
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.It armv7 Ta 4K, 1M
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.It arm64 Ta 4K, 2M, 1G
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.It i386 Ta 4K, 2M (PAE), 4M
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.It mips Ta 4K
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.It mipsel Ta 4K
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@ -268,11 +268,11 @@ is 8 bytes on all supported architectures except i386.
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.Ss Floating Point
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.Bl -column -offset indent "Sy Architecture" "Sy float, double" "Sy long double"
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.It Sy Architecture Ta Sy float, double Ta Sy long double
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.It aarch64 Ta hard Ta soft, quad precision
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.It amd64 Ta hard Ta hard, 80 bit
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.It arm Ta soft Ta soft, double precision
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.It armv6 Ta hard(1) Ta hard, double precision
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.It armv7 Ta hard(1) Ta hard, double precision
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.It arm64 Ta hard Ta soft, quad precision
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.It i386 Ta hard Ta hard, 80 bit
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.It mips Ta soft Ta identical to double
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.It mipsel Ta soft Ta identical to double
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@ -320,11 +320,11 @@ is not used on
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Architecture-specific macros:
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.Bl -column -offset indent "Sy Architecture" "Sy Predefined macros"
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.It Sy Architecture Ta Sy Predefined macros
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.It aarch64 Ta Dv __aarch64__
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.It amd64 Ta Dv __amd64__, Dv __x86_64__
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.It arm Ta Dv __arm__
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.It armv6 Ta Dv __arm__, Dv __ARM_ARCH >= 6
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.It armv7 Ta Dv __arm__, Dv __ARM_ARCH >= 7
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.It arm64 Ta Dv __aarch64__
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.It i386 Ta Dv __i386__
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.It mips Ta Dv __mips__, Dv __MIPSEB__, Dv __mips_o32
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.It mipsel Ta Dv __mips__, Dv __mips_o32
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