Move the itm reload to a single place rather than having two identical
copies of the reload. Note that we use the precomputed itm_reload value so that we can avoid a division in the kernel. The ia64 cpu does not have integer divide, so this would have been done by a floating point operation.
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584a6a5f1c
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1d946ebfc2
@ -123,19 +123,19 @@ interrupt(u_int64_t vector, struct trapframe *framep)
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intrcnt[INTRCNT_CLOCK]++;
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intrcnt[INTRCNT_CLOCK]++;
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#endif
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#endif
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critical_enter();
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critical_enter();
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/* Rearm so we get the next clock interrupt */
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ia64_set_itm(ia64_get_itc() + itm_reload);
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#ifdef SMP
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#ifdef SMP
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clks[PCPU_GET(cpuid)]++;
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clks[PCPU_GET(cpuid)]++;
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/* Only the BSP runs the real clock */
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/* Only the BSP runs the real clock */
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if (PCPU_GET(cpuid) == 0) {
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if (PCPU_GET(cpuid) == 0) {
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#endif
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#endif
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ia64_set_itm(ia64_get_itc() + itm_reload);
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hardclock((struct clockframe *)framep);
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hardclock((struct clockframe *)framep);
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/* divide hz (1024) by 8 to get stathz (128) */
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/* divide hz (1024) by 8 to get stathz (128) */
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if ((++schedclk2 & 0x7) == 0)
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if ((++schedclk2 & 0x7) == 0)
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statclock((struct clockframe *)framep);
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statclock((struct clockframe *)framep);
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#ifdef SMP
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#ifdef SMP
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} else {
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} else {
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ia64_set_itm(ia64_get_itc() + itm_reload);
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mtx_lock_spin(&sched_lock);
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mtx_lock_spin(&sched_lock);
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hardclock_process(curthread, TRAPF_USERMODE(framep));
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hardclock_process(curthread, TRAPF_USERMODE(framep));
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if ((schedclk2 & 0x7) == 0)
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if ((schedclk2 & 0x7) == 0)
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