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- Explicitly name the fields in pcb that we use to store trap state for later

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retrieval, rather than using pad
- save the fault address in sfar for use by the alignment fixup handler
- mask off the trap number, so the context id doesn't confuse the UT_MAX
  comparison

This change fixes alignment fixup handling which is needed for traceroute
to work in spite of its copious unaligned accesses
This commit is contained in:
kmacy 2006-11-29 05:18:19 +00:00
parent 4e25808d33
commit 1eddb5f0f6
3 changed files with 29 additions and 15 deletions
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5
sys/sparc64/sparc64/genassym.c
View File

@ -231,6 +231,11 @@ ASSYM(PC_PMAP, offsetof(struct pcpu, pc_curpmap));
ASSYM(PC_TSBWBUF, offsetof(struct pcpu, pc_tsbwbuf));
ASSYM(PCB_KSTACK, offsetof(struct pcb, pcb_kstack));
ASSYM(PCB_TSTATE, offsetof(struct pcb, pcb_tstate));
ASSYM(PCB_TPC, offsetof(struct pcb, pcb_tpc));
ASSYM(PCB_TNPC, offsetof(struct pcb, pcb_tnpc));
ASSYM(PCB_TT, offsetof(struct pcb, pcb_tt));
ASSYM(PCB_SFAR, offsetof(struct pcb, pcb_sfar));
ASSYM(INTR_REPORT_SIZE, INTR_REPORT_SIZE);
ASSYM(PM_TSB_MISS_COUNT, offsetof(struct pmap, pm_tsb_miss_count));
ASSYM(PM_TSB_CAP_MISS_COUNT, offsetof(struct pmap, pm_tsb_cap_miss_count));

7
sys/sun4v/include/pcb.h
View File

@ -46,7 +46,12 @@ struct pcb {
uint64_t pcb_pc;
uint64_t pcb_sp;
uint64_t pcb_kstack; /* pcb's kernel stack */
uint64_t pcb_pad[4];
uint64_t pcb_tstate;
uint64_t pcb_tpc;
uint64_t pcb_tnpc;
uint64_t pcb_tt;
uint64_t pcb_sfar;
uint64_t pcb_pad[7];
} __aligned(64);
#ifdef _KERNEL

32
sys/sun4v/sun4v/exception.S
View File

@ -739,10 +739,10 @@ tick_ ## tl ## _entry: \
! fetch FP context into local registers
.macro tl0_fpemu_context
GET_PCB(PCB_REG) ! 3 instructions
ldx [PCB_REG + PCB_PAD], %l5 ! %tstate
ldx [PCB_REG + PCB_PAD + 8], %l6 ! %tpc
ldx [PCB_REG + PCB_PAD + 16], %l7 ! %tncp
ldx [PCB_REG + PCB_PAD + 24], %g2 ! %tt
ldx [PCB_REG + PCB_TSTATE], %l5 ! %tstate
ldx [PCB_REG + PCB_TPC], %l6 ! %tpc
ldx [PCB_REG + PCB_TNPC], %l7 ! %tnpc
ldx [PCB_REG + PCB_TT], %g2 ! %tt
ba,a,pt %xcc, tl0_fpemu_context
.align 32
.endm
@ -750,7 +750,8 @@ tick_ ## tl ## _entry: \
ENTRY(tl0_fpemu_context)
mov %g2, %o0
clr %o1
ldx [PCB_REG + PCB_SFAR], %o4
rd %fprs, %l1
or %l1, FPRS_FEF, %l2
wr %l2, 0, %fprs
@ -1414,32 +1415,35 @@ ENTRY(tl0_trap)
nop
ENTRY(tl0_utrap)
GET_PCPU_SCRATCH
cmp %g2, UT_MAX
bge,a,pn %xcc, skip_utrap
and %g2, TRAP_MASK, %g4
cmp %g4, UT_MAX
bge,a,pt %xcc, skip_utrap
nop
ldx [PCPU(CURTHREAD)], %g5
ldx [%g5 + TD_PROC], %g5
ldx [%g5 + P_MD + MD_UTRAP], %g5
brz,pn %g5, skip_utrap
sllx %g2, PTR_SHIFT, %g6
sllx %g4, PTR_SHIFT, %g6
ldx [%g5 + %g6], %g5
brz,pn %g5, skip_utrap
nop
mov %g4, %g2
mov %g5, %g4
! 0) save trap state to memory
ldx [PCPU_REG + PC_CURPCB], %g6
rdpr %tstate, %g5
stx %g5, [%g6 + PCB_PAD]
stx %g5, [%g6 + PCB_TSTATE]
rdpr %tpc, %g5
stx %g5, [%g6 + PCB_PAD + 8]
stx %g5, [%g6 + PCB_TPC]
rdpr %tnpc, %g5
stx %g5, [%g6 + PCB_PAD + 16]
stx %g2, [%g6 + PCB_PAD + 24]
stx %g5, [%g6 + PCB_TNPC]
stx %g2, [%g6 + PCB_TT]
stx %g3, [%g6 + PCB_SFAR]
wrpr %g4, %tnpc
done
skip_utrap: