From 1f066c248f61dd818938fcd6a3f0a34b11b94f2e Mon Sep 17 00:00:00 2001 From: mmel Date: Sun, 5 Nov 2017 16:52:54 +0000 Subject: [PATCH] All CP15 registers are bit fields or counters, don't use signed type when accessing them. MFC after: 3 weeks --- sys/arm/include/cpu-v4.h | 6 +++--- sys/arm/include/cpu-v6.h | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/sys/arm/include/cpu-v4.h b/sys/arm/include/cpu-v4.h index bd383d3f2d90..2574f47469ae 100644 --- a/sys/arm/include/cpu-v4.h +++ b/sys/arm/include/cpu-v4.h @@ -51,10 +51,10 @@ #define _FX(s...) #s #define _RF0(fname, aname...) \ -static __inline register_t \ +static __inline uint32_t \ fname(void) \ { \ - register_t reg; \ + uint32_t reg; \ __asm __volatile("mrc\t" _FX(aname): "=r" (reg)); \ return(reg); \ } @@ -77,7 +77,7 @@ fname(void) \ #define _WF1(fname, aname...) \ static __inline void \ -fname(register_t reg) \ +fname(uint32_t reg) \ { \ __asm __volatile("mcr\t" _FX(aname):: "r" (reg)); \ } diff --git a/sys/arm/include/cpu-v6.h b/sys/arm/include/cpu-v6.h index b1d41a46d2e9..3077eb95def9 100644 --- a/sys/arm/include/cpu-v6.h +++ b/sys/arm/include/cpu-v6.h @@ -103,10 +103,10 @@ extern int pmu_attched; #define _FX(s...) #s #define _RF0(fname, aname...) \ -static __inline register_t \ +static __inline uint32_t \ fname(void) \ { \ - register_t reg; \ + uint32_t reg; \ __asm __volatile("mrc\t" _FX(aname): "=r" (reg)); \ return(reg); \ } @@ -129,7 +129,7 @@ fname(void) \ #define _WF1(fname, aname...) \ static __inline void \ -fname(register_t reg) \ +fname(uint32_t reg) \ { \ __asm __volatile("mcr\t" _FX(aname):: "r" (reg)); \ }