FCP-101: Remove tx(4).
Relnotes: yes FCP: https://github.com/freebsd/fcp/blob/master/fcp-0101.md Reviewed by: jhb, imp Differential Revision: https://reviews.freebsd.org/D20230
This commit is contained in:
brooks
parent
856026641a
commit
1f22780d00
@ -56,6 +56,8 @@ OLD_FILES+=usr/share/man/man4/sn.4
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OLD_FILES+=usr/share/man/man4/if_sn.4
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OLD_FILES+=usr/share/man/man4/tl.4
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OLD_FILES+=usr/share/man/man4/if_tl.4
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OLD_FILES+=usr/share/man/man4/tx.4
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OLD_FILES+=usr/share/man/man4/if_tx.4
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# 20190513: libcap_sysctl interface change
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OLD_FILES+=lib/casper/libcap_sysctl.1
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# 20190509: tests/sys/opencrypto requires the net/py-dpkt package.
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@ -524,7 +524,6 @@ MAN= aac.4 \
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twa.4 \
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twe.4 \
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tws.4 \
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tx.4 \
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txp.4 \
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udp.4 \
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udplite.4 \
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@ -717,7 +716,6 @@ MLINKS+=tap.4 if_tap.4
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MLINKS+=tdfx.4 tdfx_linux.4
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MLINKS+=ti.4 if_ti.4
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MLINKS+=tun.4 if_tun.4
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MLINKS+=tx.4 if_tx.4
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MLINKS+=txp.4 if_txp.4
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MLINKS+=ure.4 if_ure.4
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MLINKS+=vge.4 if_vge.4
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@ -1,128 +0,0 @@
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.\"
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.\" Copyright (c) 1998-2001 Semen Ustimenko <semenu@FreeBSD.org>
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.\"
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE DEVELOPERS ``AS IS'' AND ANY EXPRESS OR
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.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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.\" IN NO EVENT SHALL THE DEVELOPERS BE LIABLE FOR ANY DIRECT, INDIRECT,
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.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd October 24, 2018
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.Dt TX 4
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.Os
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.Sh NAME
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.Nm tx
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.Nd "SMC 83c17x Fast Ethernet device driver"
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.Sh SYNOPSIS
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To compile this driver into the kernel,
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place the following lines in your
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kernel configuration file:
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.Bd -ragged -offset indent
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.Cd "device miibus"
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.Cd "device tx"
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.Ed
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.Pp
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Alternatively, to load the driver as a
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module at boot time, place the following line in
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.Xr loader.conf 5 :
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.Bd -literal -offset indent
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if_tx_load="YES"
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.Ed
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.Sh DEPRECATION NOTICE
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The
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.Nm
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driver is not present in
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.Fx 13.0
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and later.
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See https://github.com/freebsd/fcp/blob/master/fcp-0101.md for more
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information.
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.Sh DESCRIPTION
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The
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.Nm
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driver provides support for the Ethernet adapters based on the
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SMC 83c17x (EPIC) chips.
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These are mostly SMC 9432 series cards.
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.Pp
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The
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.Nm
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driver supports the following media types (depending on card's capabilities):
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.Bl -tag -width ".Cm 10baseT/UTP"
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.It Cm autoselect
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Enable autonegotiation (default).
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.It Cm 100baseFX
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Set 100Mbps (Fast Ethernet) fiber optic operation.
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.It Cm 100baseTX
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Set 100Mbps (Fast Ethernet) twisted pair operation.
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.It Cm 10baseT/UTP
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Set 10Mbps on 10baseT port.
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.It Cm 10base2/BNC
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Set 10Mbps on 10base2 port.
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.El
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.Pp
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The
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.Nm
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driver supports the following media options:
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.Bl -tag -width ".Cm full-duplex"
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.It Cm full-duplex
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Set full-duplex operation.
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.El
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.Pp
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The
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.Nm
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driver supports oversized Ethernet packets (up to 1600 bytes).
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Refer to the
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.Xr ifconfig 8
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man page on setting the interface's MTU.
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.Pp
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The old
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.Dq Li "ifconfig tx0 linkN"
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method of configuration is not supported.
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.Ss "VLAN (IEEE 802.1Q) support"
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The
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.Nm
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driver supports the VLAN operation (using
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.Xr vlan 4
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interfaces) without decreasing the MTU on the
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.Xr vlan 4
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interfaces.
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.Sh DIAGNOSTICS
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.Bl -diag
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.It "tx%d: device timeout %d packets"
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The device stops responding.
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Device and driver reset follows this error.
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.It "tx%d: PCI fatal error occurred (%s)"
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One of following errors occurred: PCI Target Abort, PCI Master Abort, Data
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Parity Error or Address Parity Error.
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Device and driver reset follows this error.
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.It "tx%d: cannot allocate mbuf header/cluster"
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Cannot allocate memory for received packet.
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Packet thrown away.
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.It "tx%d: can't stop %s DMA"
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While resetting, the driver failed to stop the device correctly.
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.El
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.Sh SEE ALSO
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.Xr arp 4 ,
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.Xr miibus 4 ,
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.Xr netintro 4 ,
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.Xr ng_ether 4 ,
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.Xr ifconfig 8
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.Sh BUGS
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The auto-negotiation does not work very well.
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@ -278,7 +278,6 @@ device sis # Silicon Integrated Systems SiS 900/SiS 7016
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device sk # SysKonnect SK-984x & SK-982x gigabit Ethernet
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device ste # Sundance ST201 (D-Link DFE-550TX)
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device stge # Sundance/Tamarack TC9021 gigabit Ethernet
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device tx # SMC EtherPower II (83c170 ``EPIC'')
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device vge # VIA VT612x gigabit Ethernet
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device vr # VIA Rhine, Rhine II
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device wb # Winbond W89C840F
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@ -1995,7 +1995,6 @@ device xmphy # XaQti XMAC II
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# Tigon 1 and Tigon 2 chipsets. This includes the Alteon AceNIC, the
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# 3Com 3c985, the Netgear GA620 and various others. Note that you will
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# probably want to bump up kern.ipc.nmbclusters a lot to use this driver.
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# tx: SMC 9432 TX, BTX and FTX cards. (SMC EtherPower II series)
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# txp: Support for 3Com 3cR990 cards with the "Typhoon" chipset
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# vr: Support for various fast ethernet adapters based on the VIA
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# Technologies VT3043 `Rhine I' and VT86C100A `Rhine II' chips,
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@ -2055,7 +2054,6 @@ device sis # Silicon Integrated Systems SiS 900/SiS 7016
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device sk # SysKonnect SK-984x & SK-982x gigabit Ethernet
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device ste # Sundance ST201 (D-Link DFE-550TX)
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device stge # Sundance/Tamarack TC9021 gigabit Ethernet
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device tx # SMC EtherPower II (83c170 ``EPIC'')
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device vr # VIA Rhine, Rhine II
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device vte # DM&P Vortex86 RDC R6040 Fast Ethernet
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device wb # Winbond W89C840F
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@ -3155,7 +3155,6 @@ dev/tws/tws_cam.c optional tws
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dev/tws/tws_hdm.c optional tws
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dev/tws/tws_services.c optional tws
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dev/tws/tws_user.c optional tws
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dev/tx/if_tx.c optional tx
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dev/txp/if_txp.c optional txp
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dev/uart/uart_bus_acpi.c optional uart acpi
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dev/uart/uart_bus_ebus.c optional uart ebus
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1858
sys/dev/tx/if_tx.c
1858
sys/dev/tx/if_tx.c
File diff suppressed because it is too large
Load Diff
@ -1,250 +0,0 @@
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/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 1997 Semen Ustimenko
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#define EPIC_MAX_MTU 1600 /* This is experiment-derived value */
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/* PCI aux configuration registers */
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#define PCIR_BASEIO PCIR_BAR(0) /* Base IO Address */
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#define PCIR_BASEMEM PCIR_BAR(1) /* Base Memory Address */
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/* PCI identification */
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#define SMC_VENDORID 0x10B8
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#define SMC_DEVICEID_83C170 0x0005
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/* EPIC's registers */
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#define COMMAND 0x0000
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#define INTSTAT 0x0004 /* Interrupt status. See below */
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#define INTMASK 0x0008 /* Interrupt mask. See below */
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#define GENCTL 0x000C
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#define NVCTL 0x0010
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#define EECTL 0x0014 /* EEPROM control **/
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#define TEST1 0x001C /* XXXXX */
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#define CRCCNT 0x0020 /* CRC error counter */
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#define ALICNT 0x0024 /* FrameTooLang error counter */
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#define MPCNT 0x0028 /* MissedFrames error counters */
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#define MIICTL 0x0030
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#define MIIDATA 0x0034
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#define MIICFG 0x0038
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#define IPG 0x003C
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#define LAN0 0x0040 /* MAC address */
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#define LAN1 0x0044 /* MAC address */
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#define LAN2 0x0048 /* MAC address */
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#define ID_CHK 0x004C
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#define MC0 0x0050 /* Multicast filter table */
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#define MC1 0x0054 /* Multicast filter table */
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#define MC2 0x0058 /* Multicast filter table */
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#define MC3 0x005C /* Multicast filter table */
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#define RXCON 0x0060 /* Rx control register */
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#define TXCON 0x0070 /* Tx control register */
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#define TXSTAT 0x0074
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#define PRCDAR 0x0084 /* RxRing bus address */
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#define PRSTAT 0x00A4
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#define PRCPTHR 0x00B0
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#define PTCDAR 0x00C4 /* TxRing bus address */
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#define ETXTHR 0x00DC
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#define COMMAND_STOP_RX 0x01
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#define COMMAND_START_RX 0x02
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#define COMMAND_TXQUEUED 0x04
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#define COMMAND_RXQUEUED 0x08
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#define COMMAND_NEXTFRAME 0x10
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#define COMMAND_STOP_TDMA 0x20
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#define COMMAND_STOP_RDMA 0x40
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#define COMMAND_TXUGO 0x80
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/* Interrupt register bits */
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#define INTSTAT_RCC 0x00000001
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#define INTSTAT_HCC 0x00000002
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#define INTSTAT_RQE 0x00000004
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#define INTSTAT_OVW 0x00000008
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#define INTSTAT_RXE 0x00000010
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#define INTSTAT_TXC 0x00000020
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#define INTSTAT_TCC 0x00000040
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#define INTSTAT_TQE 0x00000080
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#define INTSTAT_TXU 0x00000100
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#define INTSTAT_CNT 0x00000200
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#define INTSTAT_PREI 0x00000400
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#define INTSTAT_RCT 0x00000800
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#define INTSTAT_FATAL 0x00001000 /* One of DPE,APE,PMA,PTA happened */
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#define INTSTAT_UNUSED1 0x00002000
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#define INTSTAT_UNUSED2 0x00004000
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#define INTSTAT_GP2 0x00008000 /* PHY Event */
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#define INTSTAT_INT_ACTV 0x00010000
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#define INTSTAT_RXIDLE 0x00020000
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#define INTSTAT_TXIDLE 0x00040000
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#define INTSTAT_RCIP 0x00080000
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#define INTSTAT_TCIP 0x00100000
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#define INTSTAT_RBE 0x00200000
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#define INTSTAT_RCTS 0x00400000
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#define INTSTAT_RSV 0x00800000
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#define INTSTAT_DPE 0x01000000 /* PCI Fatal error */
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#define INTSTAT_APE 0x02000000 /* PCI Fatal error */
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#define INTSTAT_PMA 0x04000000 /* PCI Fatal error */
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#define INTSTAT_PTA 0x08000000 /* PCI Fatal error */
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#define GENCTL_SOFT_RESET 0x00000001
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#define GENCTL_ENABLE_INTERRUPT 0x00000002
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#define GENCTL_SOFTWARE_INTERRUPT 0x00000004
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#define GENCTL_POWER_DOWN 0x00000008
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#define GENCTL_ONECOPY 0x00000010
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#define GENCTL_BIG_ENDIAN 0x00000020
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#define GENCTL_RECEIVE_DMA_PRIORITY 0x00000040
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#define GENCTL_TRANSMIT_DMA_PRIORITY 0x00000080
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#define GENCTL_RECEIVE_FIFO_THRESHOLD128 0x00000300
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#define GENCTL_RECEIVE_FIFO_THRESHOLD96 0x00000200
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#define GENCTL_RECEIVE_FIFO_THRESHOLD64 0x00000100
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#define GENCTL_RECEIVE_FIFO_THRESHOLD32 0x00000000
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#define GENCTL_MEMORY_READ_LINE 0x00000400
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#define GENCTL_MEMORY_READ_MULTIPLE 0x00000800
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#define GENCTL_SOFTWARE1 0x00001000
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#define GENCTL_SOFTWARE2 0x00002000
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#define GENCTL_RESET_PHY 0x00004000
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#define NVCTL_ENABLE_MEMORY_MAP 0x00000001
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#define NVCTL_CLOCK_RUN_SUPPORTED 0x00000002
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#define NVCTL_GP1_OUTPUT_ENABLE 0x00000004
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#define NVCTL_GP2_OUTPUT_ENABLE 0x00000008
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#define NVCTL_GP1 0x00000010
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#define NVCTL_GP2 0x00000020
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#define NVCTL_CARDBUS_MODE 0x00000040
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#define NVCTL_IPG_DELAY_MASK(x) ((x&0xF)<<7)
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#define RXCON_SAVE_ERRORED_PACKETS 0x00000001
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#define RXCON_RECEIVE_RUNT_FRAMES 0x00000002
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#define RXCON_RECEIVE_BROADCAST_FRAMES 0x00000004
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#define RXCON_RECEIVE_MULTICAST_FRAMES 0x00000008
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#define RXCON_RECEIVE_INVERSE_INDIVIDUAL_ADDRESS_FRAMES 0x00000010
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#define RXCON_PROMISCUOUS_MODE 0x00000020
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#define RXCON_MONITOR_MODE 0x00000040
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#define RXCON_EARLY_RECEIVE_ENABLE 0x00000080
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#define RXCON_EXTERNAL_BUFFER_DISABLE 0x00000000
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#define RXCON_EXTERNAL_BUFFER_16K 0x00000100
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#define RXCON_EXTERNAL_BUFFER_32K 0x00000200
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#define RXCON_EXTERNAL_BUFFER_128K 0x00000300
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#define TXCON_EARLY_TRANSMIT_ENABLE 0x00000001
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#define TXCON_LOOPBACK_DISABLE 0x00000000
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#define TXCON_LOOPBACK_MODE_INT 0x00000002
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#define TXCON_LOOPBACK_MODE_PHY 0x00000004
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#define TXCON_LOOPBACK_MODE 0x00000006
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#define TXCON_FULL_DUPLEX 0x00000006
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#define TXCON_SLOT_TIME 0x00000078
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#define MIICFG_SERIAL_ENABLE 0x00000001
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#define MIICFG_694_ENABLE 0x00000002
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#define MIICFG_694_STATUS 0x00000004
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#define MIICFG_PHY_PRESENT 0x00000008
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#define MIICFG_SMI_ENABLE 0x00000010
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#define TEST1_CLOCK_TEST 0x00000008
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/*
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* Some default values
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*/
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#define TXCON_DEFAULT (TXCON_SLOT_TIME | TXCON_EARLY_TRANSMIT_ENABLE)
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#define TRANSMIT_THRESHOLD 0x300
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#define TRANSMIT_THRESHOLD_MAX 0x600
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#define RXCON_DEFAULT (RXCON_RECEIVE_MULTICAST_FRAMES | \
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RXCON_RECEIVE_BROADCAST_FRAMES)
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#define RXCON_EARLY_RX (RXCON_EARLY_RECEIVE_ENABLE | \
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RXCON_SAVE_ERRORED_PACKETS)
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/*
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* EEPROM structure
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* SMC9432* eeprom is organized by words and only first 8 words
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* have distinctive meaning (according to datasheet)
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*/
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#define EEPROM_MAC0 0x0000 /* Byte 0 / Byte 1 */
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#define EEPROM_MAC1 0x0001 /* Byte 2 / Byte 3 */
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#define EEPROM_MAC2 0x0002 /* Byte 4 / Byte 5 */
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#define EEPROM_BID_CSUM 0x0003 /* Board Id / Check Sum */
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#define EEPROM_NVCTL 0x0004 /* NVCTL (bits 0-5) / nothing */
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#define EEPROM_PCI_MGD_MLD 0x0005 /* PCI MinGrant / MaxLatency. Desired */
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#define EEPROM_SSVENDID 0x0006 /* Subsystem Vendor Id */
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#define EEPROM_SSID 0x0006 /* Subsystem Id */
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/*
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* Hardware structures.
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*/
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/*
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* EPIC's hardware descriptors, must be aligned on dword in memory.
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* NB: to make driver happy, this two structures MUST have their sizes
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* be divisor of PAGE_SIZE.
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*/
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struct epic_tx_desc {
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volatile u_int16_t status;
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volatile u_int16_t txlength;
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volatile u_int32_t bufaddr;
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volatile u_int16_t buflength;
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volatile u_int16_t control;
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volatile u_int32_t next;
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};
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struct epic_rx_desc {
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volatile u_int16_t status;
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volatile u_int16_t rxlength;
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volatile u_int32_t bufaddr;
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volatile u_int32_t buflength;
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volatile u_int32_t next;
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};
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/*
|
||||
* This structure defines EPIC's fragment list, maximum number of frags
|
||||
* is 63. Let's use the maximum, because size of struct MUST be divisor
|
||||
* of PAGE_SIZE, and sometimes come mbufs with more then 30 frags.
|
||||
*/
|
||||
#define EPIC_MAX_FRAGS 63
|
||||
struct epic_frag_list {
|
||||
volatile u_int32_t numfrags;
|
||||
struct {
|
||||
volatile u_int32_t fragaddr;
|
||||
volatile u_int32_t fraglen;
|
||||
} frag[EPIC_MAX_FRAGS];
|
||||
volatile u_int32_t pad; /* align on 256 bytes */
|
||||
};
|
||||
|
||||
/*
|
||||
* NB: ALIGN OF ABOVE STRUCTURES
|
||||
* epic_rx_desc, epic_tx_desc, epic_frag_list - must be aligned on dword
|
||||
*/
|
||||
|
||||
#define SMC9432DMT 0xA010
|
||||
#define SMC9432TX 0xA011
|
||||
#define SMC9032TXM 0xA012
|
||||
#define SMC9032TX 0xA013
|
||||
#define SMC9432TXPWR 0xA014
|
||||
#define SMC9432BTX 0xA015
|
||||
#define SMC9432FTX 0xA016
|
||||
#define SMC9432FTX_SC 0xA017
|
||||
#define SMC9432TX_XG_ADHOC 0xA020
|
||||
#define SMC9434TX_XG_ADHOC 0xA021
|
||||
#define SMC9432FTX_ADHOC 0xA022
|
||||
#define SMC9432BTX1 0xA024
|
||||
@ -1,148 +0,0 @@
|
||||
/*-
|
||||
* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
|
||||
*
|
||||
* Copyright (c) 1997 Semen Ustimenko
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
/*
|
||||
* Configuration
|
||||
*/
|
||||
/*#define EPIC_DIAG 1*/
|
||||
/*#define EPIC_USEIOSPACE 1*/
|
||||
/*#define EPIC_EARLY_RX 1*/
|
||||
|
||||
#ifndef ETHER_MAX_LEN
|
||||
#define ETHER_MAX_LEN 1518
|
||||
#endif
|
||||
#ifndef ETHER_MIN_LEN
|
||||
#define ETHER_MIN_LEN 64
|
||||
#endif
|
||||
#ifndef ETHER_CRC_LEN
|
||||
#define ETHER_CRC_LEN 4
|
||||
#endif
|
||||
#define TX_RING_SIZE 16 /* Leave this a power of 2 */
|
||||
#define RX_RING_SIZE 16 /* And this too, to do not */
|
||||
/* confuse RX(TX)_RING_MASK */
|
||||
#define TX_RING_MASK (TX_RING_SIZE - 1)
|
||||
#define RX_RING_MASK (RX_RING_SIZE - 1)
|
||||
#define ETHER_MAX_FRAME_LEN (ETHER_MAX_LEN + ETHER_CRC_LEN)
|
||||
#define ETHER_ALIGN 2
|
||||
|
||||
/* This is driver's structure to define EPIC descriptors */
|
||||
struct epic_rx_buffer {
|
||||
struct mbuf *mbuf; /* mbuf receiving packet */
|
||||
bus_dmamap_t map; /* DMA map */
|
||||
};
|
||||
|
||||
struct epic_tx_buffer {
|
||||
struct mbuf *mbuf; /* mbuf contained packet */
|
||||
bus_dmamap_t map; /* DMA map */
|
||||
};
|
||||
|
||||
/* PHY, known by tx driver */
|
||||
#define EPIC_UNKN_PHY 0x0000
|
||||
#define EPIC_QS6612_PHY 0x0001
|
||||
#define EPIC_AC101_PHY 0x0002
|
||||
#define EPIC_LXT970_PHY 0x0003
|
||||
#define EPIC_SERIAL 0x0004
|
||||
|
||||
/* Driver status structure */
|
||||
typedef struct {
|
||||
struct ifnet *ifp;
|
||||
struct resource *res;
|
||||
struct resource *irq;
|
||||
|
||||
device_t miibus;
|
||||
device_t dev;
|
||||
struct callout timer;
|
||||
struct mtx lock;
|
||||
int tx_timeout;
|
||||
|
||||
void *sc_ih;
|
||||
bus_dma_tag_t mtag;
|
||||
bus_dma_tag_t rtag;
|
||||
bus_dmamap_t rmap;
|
||||
bus_dma_tag_t ttag;
|
||||
bus_dmamap_t tmap;
|
||||
bus_dma_tag_t ftag;
|
||||
bus_dmamap_t fmap;
|
||||
bus_dmamap_t sparemap;
|
||||
|
||||
struct epic_rx_buffer rx_buffer[RX_RING_SIZE];
|
||||
struct epic_tx_buffer tx_buffer[TX_RING_SIZE];
|
||||
|
||||
/* Each element of array MUST be aligned on dword */
|
||||
/* and bounded on PAGE_SIZE */
|
||||
struct epic_rx_desc *rx_desc;
|
||||
struct epic_tx_desc *tx_desc;
|
||||
struct epic_frag_list *tx_flist;
|
||||
u_int32_t rx_addr;
|
||||
u_int32_t tx_addr;
|
||||
u_int32_t frag_addr;
|
||||
u_int32_t flags;
|
||||
u_int32_t tx_threshold;
|
||||
u_int32_t txcon;
|
||||
u_int32_t miicfg;
|
||||
u_int32_t cur_tx;
|
||||
u_int32_t cur_rx;
|
||||
u_int32_t dirty_tx;
|
||||
u_int32_t pending_txs;
|
||||
u_int16_t cardvend;
|
||||
u_int16_t cardid;
|
||||
struct mii_softc *physc;
|
||||
u_int32_t phyid;
|
||||
int serinst;
|
||||
void *pool;
|
||||
} epic_softc_t;
|
||||
|
||||
#define EPIC_LOCK(sc) mtx_lock(&(sc)->lock)
|
||||
#define EPIC_UNLOCK(sc) mtx_unlock(&(sc)->lock)
|
||||
#define EPIC_ASSERT_LOCKED(sc) mtx_assert(&(sc)->lock, MA_OWNED)
|
||||
|
||||
struct epic_type {
|
||||
u_int16_t ven_id;
|
||||
u_int16_t dev_id;
|
||||
char *name;
|
||||
};
|
||||
|
||||
#define CSR_WRITE_4(sc, reg, val) \
|
||||
bus_write_4((sc)->res, (reg), (val))
|
||||
#define CSR_WRITE_2(sc, reg, val) \
|
||||
bus_write_2((sc)->res, (reg), (val))
|
||||
#define CSR_WRITE_1(sc, reg, val) \
|
||||
bus_write_1((sc)->res, (reg), (val))
|
||||
#define CSR_READ_4(sc, reg) \
|
||||
bus_read_4((sc)->res, (reg))
|
||||
#define CSR_READ_2(sc, reg) \
|
||||
bus_read_2((sc)->res, (reg))
|
||||
#define CSR_READ_1(sc, reg) \
|
||||
bus_read_1((sc)->res, (reg))
|
||||
|
||||
#define PHY_READ_2(sc, phy, reg) \
|
||||
epic_read_phy_reg((sc), (phy), (reg))
|
||||
#define PHY_WRITE_2(sc, phy, reg, val) \
|
||||
epic_write_phy_reg((sc), (phy), (reg), (val))
|
||||
@ -260,7 +260,6 @@ device sis # Silicon Integrated Systems SiS 900/SiS 7016
|
||||
device sk # SysKonnect SK-984x & SK-982x gigabit Ethernet
|
||||
device ste # Sundance ST201 (D-Link DFE-550TX)
|
||||
device stge # Sundance/Tamarack TC9021 gigabit Ethernet
|
||||
device tx # SMC EtherPower II (83c170 ``EPIC'')
|
||||
device vge # VIA VT612x gigabit Ethernet
|
||||
device vr # VIA Rhine, Rhine II
|
||||
device vte # DM&P Vortex86 RDC R6040 Fast Ethernet
|
||||
|
||||
@ -355,7 +355,6 @@ SUBDIR= \
|
||||
${_twa} \
|
||||
twe \
|
||||
tws \
|
||||
tx \
|
||||
${_txp} \
|
||||
uart \
|
||||
ubsec \
|
||||
|
||||
@ -1,9 +0,0 @@
|
||||
# $FreeBSD$
|
||||
|
||||
.PATH: ${SRCTOP}/sys/dev/tx
|
||||
|
||||
KMOD= if_tx
|
||||
SRCS= if_tx.c device_if.h bus_if.h pci_if.h
|
||||
SRCS+= miibus_if.h miidevs.h
|
||||
|
||||
.include <bsd.kmod.mk>
|
||||
@ -207,7 +207,6 @@ device sis # Silicon Integrated Systems SiS 900/SiS 7016
|
||||
device sk # SysKonnect SK-984x & SK-982x gigabit Ethernet
|
||||
device ste # Sundance ST201 (D-Link DFE-550TX)
|
||||
device stge # Sundance/Tamarack TC9021 gigabit Ethernet
|
||||
#device tx # SMC EtherPower II (83c170 ``EPIC'')
|
||||
device vr # VIA Rhine, Rhine II
|
||||
#device wb # Winbond W89C840F
|
||||
device xl # 3Com 3c90x (``Boomerang'', ``Cyclone'')
|
||||
|
||||
Loading…
Reference in New Issue
Block a user