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Add some (totally untested!) code to correctly set the RF half/quarter

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mode configuration registers. This is apparently required for correct
behaviour, but also requires the chip to actually officially support it.

Sponsored by:	Hobnob, Inc.
This commit is contained in:
adrian 2011-11-19 21:12:35 +00:00
parent 3a882beede
commit 1fa90aaeee
1 changed files with 14 additions and 0 deletions
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14
sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
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@ -724,6 +724,20 @@ ar5416SetRfMode(struct ath_hal *ah, const struct ieee80211_channel *chan)
rfMode |= IEEE80211_IS_CHAN_5GHZ(chan) ?
AR_PHY_MODE_RF5GHZ : AR_PHY_MODE_RF2GHZ;
}
/*
* Set half/quarter mode flags if required.
*
* This doesn't change the IFS timings at all; that needs to
* be done as part of the MAC setup. Similarly, the PLL
* configuration also needs some changes for the half/quarter
* rate clock.
*/
if (IEEE80211_IS_CHAN_HALF(chan))
rfMode |= AR_PHY_MODE_HALF;
else if (IEEE80211_IS_CHAN_QUARTER(chan))
rfMode |= AR_PHY_MODE_QUARTER;
OS_REG_WRITE(ah, AR_PHY_MODE, rfMode);
}