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Back out an inappropriate backout. If Anyone wants to set the FIFO

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level that high they should first fix the problems with the system that
cause silo overflows.  It is far more important for the serial device
to work.
This commit is contained in:
dillon 2001-12-23 02:48:25 +00:00
parent 811c978c99
commit 1fc3d5eabb
1 changed files with 6 additions and 1 deletions
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7
sys/dev/sio/sio.c
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@ -2161,9 +2161,14 @@ comparam(tp, t)
* latencies are reasonable for humans. Serial comms
* protocols shouldn't expect anything better since modem
* latencies are larger.
*
* The fifo trigger level cannot be set at RX_HIGH for high
* speed connections without further work on reducing
* interrupt disablement times in other parts of the system,
* without producing silo overflow errors.
*/
com->fifo_image = t->c_ospeed <= 4800
? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_HIGH;
? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDHI;
#ifdef COM_ESP
/*
* The Hayes ESP card needs the fifo DMA mode bit set