From 21a8f93615618fc67c96c22c959dacf4e044330f Mon Sep 17 00:00:00 2001 From: nwhitehorn Date: Sat, 30 Oct 2010 23:09:56 +0000 Subject: [PATCH] Allow access to the HT I/O port space on the IBM CPC9X5 northbridge chips. MFC after: 2 weeks --- sys/powerpc/powermac/cpcht.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/sys/powerpc/powermac/cpcht.c b/sys/powerpc/powermac/cpcht.c index 3af4d608c64e..ab5c870f8373 100644 --- a/sys/powerpc/powermac/cpcht.c +++ b/sys/powerpc/powermac/cpcht.c @@ -162,6 +162,7 @@ struct cpcht_softc { vm_offset_t sc_data; uint64_t sc_populated_slots; struct rman sc_mem_rman; + struct rman sc_io_rman; struct cpcht_irq htirq_map[128]; struct mtx htirq_mtx; @@ -177,6 +178,9 @@ static devclass_t cpcht_devclass; DRIVER_MODULE(cpcht, nexus, cpcht_driver, cpcht_devclass, 0, 0); +#define CPCHT_IOPORT_BASE 0xf4000000UL /* Hardwired */ +#define CPCHT_IOPORT_SIZE 0x00400000UL + #define HTAPIC_REQUEST_EOI 0x20 #define HTAPIC_TRIGGER_LEVEL 0x02 #define HTAPIC_MASK 0x01 @@ -236,7 +240,14 @@ cpcht_attach(device_t dev) sc->sc_mem_rman.rm_type = RMAN_ARRAY; sc->sc_mem_rman.rm_descr = "CPCHT Device Memory"; error = rman_init(&sc->sc_mem_rman); + if (error) { + device_printf(dev, "rman_init() failed. error = %d\n", error); + return (error); + } + sc->sc_io_rman.rm_type = RMAN_ARRAY; + sc->sc_io_rman.rm_descr = "CPCHT I/O Memory"; + error = rman_init(&sc->sc_io_rman); if (error) { device_printf(dev, "rman_init() failed. error = %d\n", error); return (error); @@ -248,6 +259,9 @@ cpcht_attach(device_t dev) * where we get the HT interrupts properties. */ + /* I/O port mappings are usually not in the device tree */ + rman_manage_region(&sc->sc_io_rman, 0, CPCHT_IOPORT_SIZE - 1); + bzero(sc->htirq_map, sizeof(sc->htirq_map)); mtx_init(&sc->htirq_mtx, "cpcht irq", NULL, MTX_DEF); for (i = 0; i < 8; i++) @@ -299,6 +313,9 @@ cpcht_configure_htbridge(device_t dev, phandle_t child) case OFW_PCI_PHYS_HI_SPACE_CONFIG: break; case OFW_PCI_PHYS_HI_SPACE_IO: + rman_manage_region(&sc->sc_io_rman, rp->pci_lo, + rp->pci_lo + rp->size_lo - 1); + break; case OFW_PCI_PHYS_HI_SPACE_MEM32: rman_manage_region(&sc->sc_mem_rman, rp->pci_lo, rp->pci_lo + rp->size_lo - 1); @@ -507,8 +524,9 @@ cpcht_alloc_resource(device_t bus, device_t child, int type, int *rid, switch (type) { case SYS_RES_IOPORT: end = min(end, start + count); + rm = &sc->sc_io_rman; + break; - /* FALLTHROUGH */ case SYS_RES_MEMORY: rm = &sc->sc_mem_rman; break; @@ -562,6 +580,9 @@ cpcht_activate_resource(device_t bus, device_t child, int type, int rid, start = (vm_offset_t)rman_get_start(res); + if (type == SYS_RES_IOPORT) + start += CPCHT_IOPORT_BASE; + if (bootverbose) printf("cpcht mapdev: start %zx, len %ld\n", start, rman_get_size(res));