d/freebsd-skq
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Do not setup machine exception vector.

Browse Source 
Sounds strange, but both RocketCore and lowRISC do not operate
if we set it.

All the known implementations (Spike, QEMU, RocketCore, lowRISC) uses
default machine trap vector address and operates fine with this.

Original Berkeley Boot Loader (bbl) does not set this as well.

Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
This commit is contained in:
Ruslan Bukin 2016-04-25 13:30:37 +00:00
parent f8f69c9385
commit 21e2c118b8
1 changed files with 0 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
sys/riscv/riscv/locore.S
View File

@ -133,9 +133,6 @@ _start:
la t0, hardstack_end
csrw mscratch, t0
la t0, mentry
csrw mtvec, t0
li t0, 0
csrw sscratch, t0
@ -335,10 +332,6 @@ ENTRY(mpentry)
lw t1, 0(t0)
beqz t1, 1b
/* Setup machine exception vector */
la t0, mentry
csrw mtvec, t0
/* Build event queue ring for this core */
build_ring