- Add some more x86 instructions to emulate,
- emulate VGA read mode 0, - emulate VGA write mode 1, - minor cleanup. Protel's Easytrax, a free PCB layout program, almost runs now; there are still some problems with the keyboard emulation, but the graphics are fine (albeit a bit slow).
This commit is contained in:
tg
parent
3089204ae8
commit
23487998fa
@ -29,14 +29,16 @@
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#include "doscmd.h"
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#include "video.h"
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static u_int32_t decode_modrm(u_int8_t *, u_int16_t, regcontext_t *, int *);
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static u_int8_t reg8(u_int8_t c, regcontext_t *);
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static u_int16_t reg16(u_int8_t c, regcontext_t *);
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static u_int32_t decode_modrm(u_int8_t *, u_int16_t,
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regcontext_t *, int *);
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static u_int8_t *reg8(u_int8_t c, regcontext_t *);
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static u_int16_t *reg16(u_int8_t c, regcontext_t *);
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#if 0
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static u_int32_t reg32(u_int8_t c, regcontext_t *);
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static u_int32_t *reg32(u_int8_t c, regcontext_t *);
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#endif
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static void write_byte(u_int32_t, u_int8_t);
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static void write_word(u_int32_t, u_int16_t);
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static u_int8_t read_byte(u_int32_t);
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static void write_byte(u_int32_t, u_int8_t);
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static void write_word(u_int32_t, u_int16_t);
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/*
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** Hardware /0 interrupt
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@ -120,90 +122,163 @@ emu_instr(regcontext_t *REGS)
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int prefix = 1;
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u_int8_t *cs = (u_int8_t *)(R_CS << 4);
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int ip = R_IP;
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int instrlen;
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int dir;
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u_int16_t value;
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u_int16_t seg = R_DS;
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u_int32_t addr, endaddr;
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int dir, i, instrlen;
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u_int8_t *r8;
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u_int8_t val8;
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u_int16_t val16;
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u_int16_t *seg = &R_DS;
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u_int32_t addr, toaddr;
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while (prefix) {
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prefix = 0;
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switch (cs[ip]) {
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case 0x08: /* or r/m8, r8 */
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addr = decode_modrm(cs + ip, *seg, REGS, &instrlen);
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r8 = reg8(cs[ip + 1], REGS);
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val8 = read_byte(addr) | *r8;
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write_byte(addr, val8);
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/* clear carry and overflow; check zero, sign, parity */
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R_EFLAGS &= ~PSL_C | ~PSL_V;
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if (val8 == 0)
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R_EFLAGS |= PSL_Z;
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if (val8 % 2 != 0)
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R_EFLAGS |= PSL_PF;
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if (val8 & 0x80)
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R_EFLAGS |= PSL_N;
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ip += 2 + instrlen;
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break;
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case 0x22: /* and r8, r/m8 */
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addr = decode_modrm(cs + ip, *seg, REGS, &instrlen);
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r8 = reg8(cs[ip + 1], REGS);
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*r8 &= read_byte(addr);
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/* clear carry and overflow; check zero, sign, parity */
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R_EFLAGS &= ~PSL_C | ~PSL_V;
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if (*r8 == 0)
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R_EFLAGS |= PSL_Z;
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if (*r8 % 2 != 0)
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R_EFLAGS |= PSL_PF;
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if (*r8 & 0x80)
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R_EFLAGS |= PSL_N;
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ip += 2 + instrlen;
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break;
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case 0x26: /* Segment Override ES */
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seg = R_ES;
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seg = &R_ES;
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prefix = 1;
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ip++;
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break;
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case 0x2e: /* Segment Override CS */
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seg = R_CS;
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seg = &R_CS;
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prefix = 1;
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ip++;
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break;
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case 0x36: /* Segment Override SS */
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seg = R_SS;
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seg = &R_SS;
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prefix = 1;
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ip++;
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break;
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case 0x3e: /* Segment Override DS */
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seg = R_DS;
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seg = &R_DS;
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prefix = 1;
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ip++;
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break;
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case 0x64: /* Segment Override FS */
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seg = R_FS;
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seg = &R_FS;
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prefix = 1;
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ip++;
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break;
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case 0x65: /* Segment Override GS */
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seg = R_GS;
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seg = &R_GS;
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prefix = 1;
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ip++;
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break;
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case 0x88: /* mov r/m8, r8 */
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addr = decode_modrm(cs + ip, seg, REGS, &instrlen);
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write_byte(addr, reg8(cs[ip + 1], REGS));
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addr = decode_modrm(cs + ip, *seg, REGS, &instrlen);
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write_byte(addr, *reg8(cs[ip + 1], REGS));
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ip += 2 + instrlen;
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break;
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case 0x8a: /* mov r8, r/m8 */
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addr = decode_modrm(cs + ip, *seg, REGS, &instrlen);
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r8 = reg8(cs[ip + 1], REGS);
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*r8 = read_byte(addr);
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ip += 2 + instrlen;
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break;
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case 0xc6: /* mov r/m8, imm8 */
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addr = decode_modrm(cs + ip, seg, REGS, &instrlen);
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addr = decode_modrm(cs + ip, *seg, REGS, &instrlen);
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write_byte(addr, cs[ip + 2 + instrlen]);
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ip += 2 + instrlen + 1;
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break;
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case 0xc7: /* mov r/m32/16, imm32/16 */
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addr = decode_modrm(cs + ip, seg, REGS, &instrlen);
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value = *(u_int16_t *)&cs[ip + 2 + instrlen];
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write_word(addr, value);
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addr = decode_modrm(cs + ip, *seg, REGS, &instrlen);
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val16 = *(u_int16_t *)&cs[ip + 2 + instrlen];
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write_word(addr, val16);
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ip += 2 + instrlen + 2;
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break;
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case 0xa4: /* movs m8, m8 */
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write_byte(MAKEPTR(R_ES, R_DI), read_byte(MAKEPTR(*seg, R_SI)));
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dir = (R_EFLAGS & PSL_D) ? -1 : 1;
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R_DI += dir;
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R_SI += dir;
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ip++;
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break;
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case 0xaa: /* stos m8 */
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addr = MAKEPTR(R_ES, R_DI);
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write_byte(addr, R_AL);
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R_DI += (R_EFLAGS & PSL_D) ? -1 : 1;
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ip++;
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break;
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case 0xab: /* stos m32/16*/
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addr = MAKEPTR(R_ES, R_DI);
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write_word(addr, R_AX);
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R_DI += (R_EFLAGS & PSL_D) ? -2 : 2;
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ip++;
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break;
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case 0xf3: /* rep */
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switch (cs[++ip]) {
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case 0xab: /* stos m32/16 */
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value = R_AX;
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case 0xa4: /* movs m8, m8 */
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/* XXX Possible optimization: if both source and target
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addresses lie within the video memory and write mode 1 is
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selected, we can use memcpy(). */
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dir = (R_EFLAGS & PSL_D) ? -1 : 1;
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addr = MAKEPTR(R_ES, R_DI);
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toaddr = MAKEPTR(*seg, R_SI);
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for (i = R_CX; i > 0; i--) {
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write_byte(addr, read_byte(toaddr));
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addr += dir;
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toaddr += dir;
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}
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PUTPTR(R_ES, R_DI, addr);
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PUTPTR(*seg, R_SI, toaddr);
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ip++;
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break;
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case 0xaa: /* stos m8 */
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/* direction */
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dir = (R_EFLAGS & PSL_D) ? -1 : 1;
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addr = MAKEPTR(R_ES, R_DI);
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endaddr = MAKEPTR(R_ES, R_DI) + dir * R_CX;
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if (addr <= endaddr)
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while (addr <= endaddr) {
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write_word(addr, value);
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addr += 2;
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}
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else
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while (addr >= endaddr) {
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write_word(addr, value);
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addr -= 2;
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}
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ip += 2;
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for (i = R_CX; i > 0; i--) {
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write_byte(addr, R_AL);
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addr += dir;
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}
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PUTPTR(R_ES, R_DI, addr);
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ip++;
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break;
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case 0xab: /* stos m32/16 */
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/* direction */
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dir = (R_EFLAGS & PSL_D) ? -2 : 2;
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addr = MAKEPTR(R_ES, R_DI);
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for (i = R_CX; i > 0; i--) {
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write_word(addr, R_AX);
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addr += dir;
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}
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PUTPTR(R_ES, R_DI, addr);
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ip++;
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break;
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default:
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R_IP = ip--; /* Move IP back to the 'rep' instruction */
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R_IP = --ip; /* Move IP back to the 'rep' instruction. */
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return -1;
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}
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break;
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default:
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/* unknown instruction, get out of here and let trap.c:sigbus()
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/* Unknown instruction, get out of here and let trap.c:sigbus()
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catch it. */
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return -1;
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}
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@ -243,9 +318,9 @@ decode_modrm(u_int8_t *c, u_int16_t seg, regcontext_t *REGS, int *instrlen)
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break;
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case 0xc0: /* reg in R/M */
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if (c[0] & 1) /* 16-bit reg */
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return reg16(c[1], REGS);
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return *reg16(c[1], REGS);
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else /* 8-bit reg */
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return reg8(c[1], REGS);
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return *reg8(c[1], REGS);
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break;
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}
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@ -284,50 +359,63 @@ decode_modrm(u_int8_t *c, u_int16_t seg, regcontext_t *REGS, int *instrlen)
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return addr;
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}
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static u_int8_t
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static u_int8_t *
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reg8(u_int8_t c, regcontext_t *REGS)
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{
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u_int8_t r8[] = {R_AL, R_CL, R_DL, R_BL, R_AH, R_CH, R_DH, R_BH};
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u_int8_t *r8[] = {&R_AL, &R_CL, &R_DL, &R_BL,
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&R_AH, &R_CH, &R_DH, &R_BH};
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/* select 'rrr' bits in ModR/M */
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return r8[(c & 0x34) >> 3];
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}
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static u_int16_t
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static u_int16_t *
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reg16(u_int8_t c, regcontext_t *REGS)
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{
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u_int16_t r16[] = {R_AX, R_CX, R_DX, R_BX, R_SP, R_BP, R_SI, R_DI};
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u_int16_t *r16[] = {&R_AX, &R_CX, &R_DX, &R_BX,
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&R_SP, &R_BP, &R_SI, &R_DI};
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return r16[(c & 0x34) >> 3];
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}
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#if 0
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/* not yet */
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static u_int32_t
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static u_int32_t *
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reg32(u_int8_t c, regcontext_t *REGS)
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{
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u_int32_t r32[] = {R_EAX, R_ECX, R_EDX, R_EBX,
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R_ESP, R_EBP, R_ESI, R_EDI};
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u_int32_t *r32[] = {&R_EAX, &R_ECX, &R_EDX, &R_EBX,
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&R_ESP, &R_EBP, &R_ESI, &R_EDI};
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return r32[(c & 0x34) >> 3];
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}
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#endif
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/* Read an 8-bit value from the location specified by 'addr'. If 'addr' lies
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within the video memory, we call 'video.c:vga_read()'. */
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static u_int8_t
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read_byte(u_int32_t addr)
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{
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if (addr >= 0xa0000 && addr < 0xb0000)
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return vga_read(addr);
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else
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return *(u_int8_t *)addr;
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}
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/* Write an 8-bit value to the location specified by 'addr'. If 'addr' lies
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within the video memory region, we call video.c:vga_write(). */
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within the video memory region, we call 'video.c:vga_write()'. */
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static void
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write_byte(u_int32_t addr, u_int8_t val)
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{
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if (addr >= 0xa0000 && addr < 0xb0000) {
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if (addr >= 0xa0000 && addr < 0xb0000)
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vga_write(addr, val);
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} else
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else
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*(u_int8_t *)addr = val;
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return;
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}
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/* Write a 16-bit value to the location specified by 'addr'. If 'addr' lies
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within the video memory region, we call video.c:vga_write(). */
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within the video memory region, we call 'video.c:vga_write()'. */
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static void
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write_word(u_int32_t addr, u_int16_t val)
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{
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@ -115,7 +115,7 @@ typedef struct TextLine {
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u_char max_length; /* Not used, but here for future use */
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u_char changed:1;
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} TextLine;
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TextLine *lines;
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TextLine *lines = NULL;
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int kbd_fd = -1;
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int kbd_read = 0;
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@ -133,14 +133,14 @@ SetVREGCur()
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VGA_CRTC[CRTC_CurLocLo] = cp & 0xff;
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}
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void _kbd_event(void *);
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void debug_event(void *);
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int video_event();
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void video_async_event(void *);
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void tty_cooked();
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unsigned char inb_port60(int);
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void kbd_event(int fd, REGISTERS);
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u_short read_raw_kbd(int fd, u_short *code);
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void _kbd_event(void *);
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void debug_event(void *);
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int video_event();
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void video_async_event(void *);
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void tty_cooked();
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unsigned char inb_port60(int);
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void kbd_event(int);
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u_short read_raw_kbd(int, u_short *);
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/* Local functions */
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#ifndef NO_X
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@ -364,7 +364,7 @@ video_update(regcontext_t *REGS)
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static int icnt = 3;
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if (kbd_read)
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kbd_event(kbd_fd, REGS);
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kbd_event(kbd_fd);
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if (--icnt == 0) {
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icnt = 3;
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@ -791,7 +791,7 @@ inb_port60(int port)
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}
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void
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kbd_event(int fd, REGISTERS)
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kbd_event(int fd)
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{
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kbd_read = 0;
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@ -998,7 +998,7 @@ video_async_event(void *pfd)
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int x;
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fd_set fdset;
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XEvent ev;
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static struct timeval tv = { 0 };
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static struct timeval tv;
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/*
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* Handle any events just sitting around...
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@ -1042,7 +1042,7 @@ video_async_event(void *pfd)
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}
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void
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kbd_async_event(int fd, REGISTERS)
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kbd_async_event(int fd)
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{
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unsigned char c;
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@ -2182,7 +2182,7 @@ get_ximage()
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XDestroyImage(xi);
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err(1, "Could not get memory for ximage data");
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}
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return;
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#endif
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}
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@ -2193,14 +2193,31 @@ get_lines()
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{
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int i;
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if (!(lines = (TextLine *)malloc(sizeof(TextLine) * height)))
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err(1, "Could not allocate data structure for text lines\n");
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for (i = 0; i < height; ++i) {
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lines[i].max_length = width;
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if (!(lines[i].data = (u_short *)malloc(width * sizeof(u_short))))
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if (lines == NULL) {
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lines = (TextLine *)malloc(sizeof(TextLine) * height);
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if (lines == NULL)
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err(1, "Could not allocate data structure for text lines\n");
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lines[i].changed = 1;
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for (i = 0; i < height; ++i) {
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lines[i].max_length = width;
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lines[i].data = (u_short *)malloc(width * sizeof(u_short));
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if (lines[i].data == NULL)
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err(1, "Could not allocate data structure for text lines\n");
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lines[i].changed = 1;
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}
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} else {
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lines = (TextLine *)realloc(lines, sizeof(TextLine) * height);
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if (lines == NULL)
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err(1, "Could not allocate data structure for text lines\n");
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for (i = 0; i < height; ++i) {
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lines[i].max_length = width;
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lines[i].data = (u_short *)realloc(lines[i].data,
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width * sizeof(u_short));
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if (lines[i].data == NULL)
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err(1, "Could not allocate data structure for text lines\n");
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lines[i].changed = 1;
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}
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}
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}
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@ -2258,7 +2275,8 @@ resize_window()
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sh->min_height = sh->max_height = sh->base_height;
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sh->flags = USSize | PMinSize | PMaxSize | PSize;
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debug(D_VIDEO, "window size %dx%d\n", sh->base_width, sh->base_height);
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debug(D_VIDEO, "VGA: Set window size %dx%d\n",
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sh->base_width, sh->base_height);
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XSetWMNormalHints(dpy, win, sh);
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XResizeWindow(dpy, win, sh->base_width, sh->base_height);
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@ -175,7 +175,7 @@ video_outb(int port, u_int8_t value)
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||||
col = cp % DpyCols;
|
||||
break;
|
||||
default:
|
||||
debug(D_VIDEO, "outb 0x%04x, 0x%02x at index 0x%02x\n",
|
||||
debug(D_VIDEO, "VGA: outb 0x%04x, 0x%02x at index 0x%02x\n",
|
||||
port, value, crtc_index);
|
||||
break;
|
||||
}
|
||||
@ -190,7 +190,7 @@ video_outb(int port, u_int8_t value)
|
||||
VGA_ATC[atc_index] = value;
|
||||
switch (atc_index) {
|
||||
default:
|
||||
debug(D_VIDEO, "outb 0x%04x, 0x%02x at index 0x%02x\n",
|
||||
debug(D_VIDEO, "VGA: outb 0x%04x, 0x%02x at index 0x%02x\n",
|
||||
port, value, crtc_index);
|
||||
break;
|
||||
}
|
||||
@ -204,7 +204,7 @@ video_outb(int port, u_int8_t value)
|
||||
VGA_TSC[tsc_index] = value;
|
||||
switch (tsc_index) {
|
||||
default:
|
||||
debug(D_VIDEO, "outb 0x%04x, 0x%02x at index 0x%02x\n",
|
||||
debug(D_VIDEO, "VGA: outb 0x%04x, 0x%02x at index 0x%02x\n",
|
||||
port, value, crtc_index);
|
||||
break;
|
||||
}
|
||||
@ -217,7 +217,7 @@ video_outb(int port, u_int8_t value)
|
||||
#if 0
|
||||
switch (gdc_index) {
|
||||
default:
|
||||
debug(D_VIDEO, "outb 0x%04x, 0x%02x at index 0x%02x\n",
|
||||
debug(D_VIDEO, "VGA: outb 0x%04x, 0x%02x at index 0x%02x\n",
|
||||
port, value, crtc_index);
|
||||
|
||||
break;
|
||||
@ -225,7 +225,7 @@ video_outb(int port, u_int8_t value)
|
||||
#endif
|
||||
break;
|
||||
default:
|
||||
debug(D_ALWAYS, "Unknown port 0x%4x\n", port);
|
||||
debug(D_ALWAYS, "VGA: Unknown port 0x%4x\n", port);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -385,7 +385,7 @@ init_mode(int mode)
|
||||
int idx; /* Index into vmode */
|
||||
int pidx; /* Index into videoparams */
|
||||
|
||||
debug(D_VIDEO, "Set video mode to 0x%02x\n", mode);
|
||||
debug(D_VIDEO, "VGA: Set video mode to 0x%02x\n", mode);
|
||||
|
||||
idx = find_vmode(mode & 0x7f);
|
||||
if (idx == -1 || vmodelist[idx].type == NOMODE)
|
||||
@ -466,7 +466,7 @@ init_mode(int mode)
|
||||
0xaffff will generate a T_PAGEFAULT trap in VM86 mode (aside: why not a
|
||||
SIGSEGV?), which is handled in 'trap.c:sigbus()'. */
|
||||
if (vmode.type == GRAPHICS) {
|
||||
vmem = mmap((void *)0xa0000, 64 * 1024, PROT_READ,
|
||||
vmem = mmap((void *)0xa0000, 64 * 1024, PROT_NONE,
|
||||
MAP_ANON | MAP_FIXED | MAP_INHERIT | MAP_SHARED, -1, 0);
|
||||
if (vmem == NULL)
|
||||
fatal("Could not mmap() video memory");
|
||||
@ -493,7 +493,7 @@ init_mode(int mode)
|
||||
'videoparams' array. */
|
||||
int find_vmode(int mode)
|
||||
{
|
||||
int i;
|
||||
unsigned i;
|
||||
|
||||
for (i = 0; i < NUMMODES; i++)
|
||||
if (vmodelist[i].modenumber == mode)
|
||||
@ -502,8 +502,6 @@ int find_vmode(int mode)
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* Handle access to the graphics memory.
|
||||
|
||||
Simply changing the protection for the memory is not enough, unfortunately.
|
||||
@ -534,6 +532,35 @@ vmem_pageflt(struct sigframe *sf)
|
||||
return emu_instr(REGS);
|
||||
}
|
||||
|
||||
/* We need to keep track of the latches' contents.*/
|
||||
static u_int8_t latch0, latch1, latch2, latch3;
|
||||
|
||||
/* Read a byte from the video memory. 'vga_read()' is called from
|
||||
'cpu.c:read_byte()' and will emulate the VGA read modes. */
|
||||
u_int8_t
|
||||
vga_read(u_int32_t addr)
|
||||
{
|
||||
u_int32_t dst;
|
||||
|
||||
/* 'addr' lies between 0xa0000 and 0xaffff. */
|
||||
dst = addr - 0xa0000;
|
||||
|
||||
/* Fill latches. */
|
||||
latch0 = vplane0[dst];
|
||||
latch1 = vplane1[dst];
|
||||
latch2 = vplane2[dst];
|
||||
latch3 = vplane3[dst];
|
||||
|
||||
/* Select read mode. */
|
||||
if ((VGA_GDC[GDC_Mode] & 0x80) == 0)
|
||||
/* Read Mode 0; return the byte from the selected bit plane. */
|
||||
return vram[dst + (VGA_GDC[GDC_ReadMapSelect] & 3) * 0x10000];
|
||||
|
||||
/* Read Mode 1 */
|
||||
debug(D_ALWAYS, "VGA: Read Mode 1 not implemented\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Write a byte to the video memory. 'vga_write()' is called from
|
||||
'cpu.c:write_word()' and will emulate the VGA write modes. Not all four
|
||||
modes are implemented yet, nor are the addressing modes (odd/even, chain4).
|
||||
@ -543,46 +570,41 @@ void
|
||||
vga_write(u_int32_t addr, u_int8_t val)
|
||||
{
|
||||
u_int32_t dst;
|
||||
u_int8_t *latch0, *latch1, *latch2, *latch3;
|
||||
u_int8_t c0, c1, c2, c3;
|
||||
u_int8_t m0, m1, m2, m3;
|
||||
u_int8_t mask;
|
||||
|
||||
#if 0
|
||||
int i;
|
||||
unsigned i;
|
||||
|
||||
debug(D_VIDEO, "Write 0x%02x to 0x%x\n", val, addr);
|
||||
debug(D_VIDEO, "GDC: ");
|
||||
debug(D_VIDEO, "VGA: Write 0x%02x to 0x%x\n", val, addr);
|
||||
debug(D_VIDEO, " GDC: ");
|
||||
for (i = 0; i < sizeof(VGA_GDC); i++)
|
||||
debug(D_VIDEO, "%02x ", VGA_GDC[i]);
|
||||
debug(D_VIDEO, "\n");
|
||||
debug(D_VIDEO, "TSC: ");
|
||||
debug(D_VIDEO, " TSC: ");
|
||||
for (i = 0; i < sizeof(VGA_TSC); i++)
|
||||
debug(D_VIDEO, "%02x ", VGA_TSC[i]);
|
||||
debug(D_VIDEO, "\n");
|
||||
#endif
|
||||
|
||||
/* 'addr' lies between 0xa0000 and 0xaffff */
|
||||
/* 'addr' lies between 0xa0000 and 0xaffff. */
|
||||
dst = addr - 0xa0000;
|
||||
|
||||
/* fill latches */
|
||||
latch0 = vplane0 + dst;
|
||||
latch1 = vplane1 + dst;
|
||||
latch2 = vplane2 + dst;
|
||||
latch3 = vplane3 + dst;
|
||||
|
||||
c0 = *latch0;
|
||||
c1 = *latch1;
|
||||
c2 = *latch2;
|
||||
c3 = *latch3;
|
||||
c0 = latch0;
|
||||
c1 = latch1;
|
||||
c2 = latch2;
|
||||
c3 = latch3;
|
||||
|
||||
/* select write mode */
|
||||
/* Select write mode. */
|
||||
switch (VGA_GDC[GDC_Mode] & 3) {
|
||||
case 0:
|
||||
/* XXX to do: Enable Set Reset register */
|
||||
|
||||
mask = VGA_GDC[GDC_BitMask];
|
||||
|
||||
/* select function */
|
||||
if (VGA_GDC[GDC_DataRotate] & 7)
|
||||
debug(D_ALWAYS, "VGA: Data Rotate != 0\n");
|
||||
|
||||
/* Select function. */
|
||||
switch (VGA_GDC[GDC_DataRotate] & 0x18) {
|
||||
case 0x00: /* replace */
|
||||
m0 = VGA_GDC[GDC_SetReset] & 1 ? mask : 0x00;
|
||||
@ -590,53 +612,54 @@ vga_write(u_int32_t addr, u_int8_t val)
|
||||
m2 = VGA_GDC[GDC_SetReset] & 4 ? mask : 0x00;
|
||||
m3 = VGA_GDC[GDC_SetReset] & 8 ? mask : 0x00;
|
||||
|
||||
c0 &= ~mask;
|
||||
c1 &= ~mask;
|
||||
c2 &= ~mask;
|
||||
c3 &= ~mask;
|
||||
c0 = VGA_GDC[GDC_EnableSetReset] & 1 ? c0 & ~mask : val & ~mask;
|
||||
c1 = VGA_GDC[GDC_EnableSetReset] & 2 ? c1 & ~mask : val & ~mask;
|
||||
c2 = VGA_GDC[GDC_EnableSetReset] & 4 ? c2 & ~mask : val & ~mask;
|
||||
c3 = VGA_GDC[GDC_EnableSetReset] & 8 ? c3 & ~mask : val & ~mask;
|
||||
|
||||
c0 |= m0;
|
||||
c1 |= m1;
|
||||
c2 |= m2;
|
||||
c3 |= m3;
|
||||
break;
|
||||
case 0x08: /* and */
|
||||
case 0x08: /* AND */
|
||||
m0 = VGA_GDC[GDC_SetReset] & 1 ? 0xff : ~mask;
|
||||
m1 = VGA_GDC[GDC_SetReset] & 2 ? 0xff : ~mask;
|
||||
m2 = VGA_GDC[GDC_SetReset] & 4 ? 0xff : ~mask;
|
||||
m3 = VGA_GDC[GDC_SetReset] & 8 ? 0xff : ~mask;
|
||||
|
||||
c0 &= m0;
|
||||
c1 &= m1;
|
||||
c2 &= m2;
|
||||
c3 &= m3;
|
||||
c0 = VGA_GDC[GDC_EnableSetReset] & 1 ? c0 & m0 : val & m0;
|
||||
c1 = VGA_GDC[GDC_EnableSetReset] & 2 ? c1 & m1 : val & m1;
|
||||
c2 = VGA_GDC[GDC_EnableSetReset] & 4 ? c2 & m2 : val & m2;
|
||||
c3 = VGA_GDC[GDC_EnableSetReset] & 8 ? c3 & m3 : val & m3;
|
||||
break;
|
||||
case 0x10: /* or */
|
||||
case 0x10: /* OR */
|
||||
m0 = VGA_GDC[GDC_SetReset] & 1 ? mask : 0x00;
|
||||
m1 = VGA_GDC[GDC_SetReset] & 2 ? mask : 0x00;
|
||||
m2 = VGA_GDC[GDC_SetReset] & 4 ? mask : 0x00;
|
||||
m3 = VGA_GDC[GDC_SetReset] & 8 ? mask : 0x00;
|
||||
|
||||
c0 |= m0;
|
||||
c1 |= m1;
|
||||
c2 |= m2;
|
||||
c3 |= m3;
|
||||
c0 = VGA_GDC[GDC_EnableSetReset] & 1 ? c0 | m0 : val | m0;
|
||||
c1 = VGA_GDC[GDC_EnableSetReset] & 2 ? c1 | m1 : val | m1;
|
||||
c2 = VGA_GDC[GDC_EnableSetReset] & 4 ? c2 | m2 : val | m2;
|
||||
c3 = VGA_GDC[GDC_EnableSetReset] & 8 ? c3 | m3 : val | m3;
|
||||
break;
|
||||
case 0x18: /* xor */
|
||||
case 0x18: /* XOR */
|
||||
m0 = VGA_GDC[GDC_SetReset] & 1 ? mask : 0x00;
|
||||
m1 = VGA_GDC[GDC_SetReset] & 2 ? mask : 0x00;
|
||||
m2 = VGA_GDC[GDC_SetReset] & 4 ? mask : 0x00;
|
||||
m3 = VGA_GDC[GDC_SetReset] & 8 ? mask : 0x00;
|
||||
|
||||
c0 ^= m0;
|
||||
c1 ^= m1;
|
||||
c2 ^= m2;
|
||||
c3 ^= m3;
|
||||
c0 = VGA_GDC[GDC_EnableSetReset] & 1 ? c0 ^ m0 : val ^ m0;
|
||||
c1 = VGA_GDC[GDC_EnableSetReset] & 2 ? c1 ^ m1 : val ^ m1;
|
||||
c2 = VGA_GDC[GDC_EnableSetReset] & 4 ? c2 ^ m2 : val ^ m2;
|
||||
c3 = VGA_GDC[GDC_EnableSetReset] & 8 ? c3 ^ m3 : val ^ m3;
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case 1:
|
||||
/* not yet */
|
||||
/* Just copy the latches' content to the desired destination
|
||||
address. */
|
||||
break;
|
||||
case 2:
|
||||
mask = VGA_GDC[GDC_BitMask];
|
||||
@ -696,18 +719,19 @@ vga_write(u_int32_t addr, u_int8_t val)
|
||||
break;
|
||||
case 3:
|
||||
/* not yet */
|
||||
debug(D_ALWAYS, "VGA: Write Mode 3 not implemented\n");
|
||||
break;
|
||||
}
|
||||
|
||||
/* write back changed byte, depending on Map Mask register */
|
||||
/* Write back changed byte, depending on Map Mask register. */
|
||||
if (VGA_TSC[TSC_MapMask] & 1)
|
||||
*latch0 = c0;
|
||||
vplane0[dst] = c0;
|
||||
if (VGA_TSC[TSC_MapMask] & 2)
|
||||
*latch1 = c1;
|
||||
vplane1[dst] = c1;
|
||||
if (VGA_TSC[TSC_MapMask] & 4)
|
||||
*latch2 = c2;
|
||||
vplane2[dst] = c2;
|
||||
if (VGA_TSC[TSC_MapMask] & 8)
|
||||
*latch3 = c3;
|
||||
vplane3[dst] = c3;
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
@ -364,13 +364,14 @@ extern vmode_t vmodelist[];
|
||||
#define FONT8x16 "vga8x16" /* same as FONTVGA */
|
||||
|
||||
/* External functions in 'video.c'. */
|
||||
extern void init_mode(int);
|
||||
extern int find_vmode(int);
|
||||
extern void vga_write(u_int32_t, u_int8_t);
|
||||
extern void video_bios_init(void);
|
||||
extern void video_init(void);
|
||||
extern int vmem_pageflt(struct sigframe *);
|
||||
void init_mode(int);
|
||||
int find_vmode(int);
|
||||
u_int8_t vga_read(u_int32_t);
|
||||
void vga_write(u_int32_t, u_int8_t);
|
||||
void video_bios_init(void);
|
||||
void video_init(void);
|
||||
int vmem_pageflt(struct sigframe *);
|
||||
|
||||
/* Other external variables, mostly from tty.c. Needs to be cleaned up. */
|
||||
extern int vattr;
|
||||
void write_vram(void *);
|
||||
extern int vattr;
|
||||
void write_vram(void *);
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user