From 23ad2eb9b87a1b76703064e329c17c7cb6a5fd4c Mon Sep 17 00:00:00 2001 From: das Date: Sat, 12 Apr 2008 03:10:13 +0000 Subject: [PATCH] Fix some bugs that caused sparc64's quad precision sqrt to get the wrong answer for virtually all inputs. Thanks to remko for access to a sparc64 box for testing. --- lib/libc/sparc64/fpu/fpu_sqrt.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/lib/libc/sparc64/fpu/fpu_sqrt.c b/lib/libc/sparc64/fpu/fpu_sqrt.c index b49b63b4195e..364384b41f69 100644 --- a/lib/libc/sparc64/fpu/fpu_sqrt.c +++ b/lib/libc/sparc64/fpu/fpu_sqrt.c @@ -334,7 +334,7 @@ __fpu_sqrt(fe) FPU_SUBC(d0, x0, t0); if ((int)d0 >= 0) { x0 = d0, x1 = d1, x2 = d2; - q |= bit; + q = bit; y1 |= 1; /* now t1, y1 are set in concrete */ } ODD_DOUBLE; @@ -366,12 +366,12 @@ __fpu_sqrt(fe) FPU_SUBCS(d2, x2, t2); FPU_SUBCS(d1, x1, t1); FPU_SUBC(d0, x0, t0); - ODD_DOUBLE; if ((int)d0 >= 0) { - x0 = d0, x1 = d1, x2 = d2; - q |= bit; + x0 = d0, x1 = d1, x2 = d2; x3 = d3; + q = bit; y2 |= 1; } + ODD_DOUBLE; while ((bit >>= 1) != 0) { EVEN_DOUBLE; t3 = y3 | bit; @@ -380,7 +380,7 @@ __fpu_sqrt(fe) FPU_SUBCS(d1, x1, t1); FPU_SUBC(d0, x0, t0); if ((int)d0 >= 0) { - x0 = d0, x1 = d1, x2 = d2; + x0 = d0, x1 = d1, x2 = d2; x3 = d3; q |= bit; y3 |= bit << 1; }