cxgbe(4): Update T4/5/6 firmwares to 1.22.0.3.
Obtained from: Chelsio Communications MFC after: 2 months Sponsored by: Chelsio Communications
This commit is contained in:
np
parent
734e41a744
commit
253162c122
@ -1451,7 +1451,7 @@ t4fw.fwo optional cxgbe \
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no-implicit-rule \
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clean "t4fw.fwo"
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t4fw.fw optional cxgbe \
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dependency "$S/dev/cxgbe/firmware/t4fw-1.19.1.0.bin.uu" \
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dependency "$S/dev/cxgbe/firmware/t4fw-1.22.0.3.bin.uu" \
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compile-with "${NORMAL_FW}" \
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no-obj no-implicit-rule \
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clean "t4fw.fw"
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@ -1485,7 +1485,7 @@ t5fw.fwo optional cxgbe \
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no-implicit-rule \
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clean "t5fw.fwo"
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t5fw.fw optional cxgbe \
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dependency "$S/dev/cxgbe/firmware/t5fw-1.19.1.0.bin.uu" \
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dependency "$S/dev/cxgbe/firmware/t5fw-1.22.0.3.bin.uu" \
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compile-with "${NORMAL_FW}" \
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no-obj no-implicit-rule \
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clean "t5fw.fw"
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@ -1519,7 +1519,7 @@ t6fw.fwo optional cxgbe \
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no-implicit-rule \
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clean "t6fw.fwo"
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t6fw.fw optional cxgbe \
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dependency "$S/dev/cxgbe/firmware/t6fw-1.19.1.0.bin.uu" \
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dependency "$S/dev/cxgbe/firmware/t6fw-1.22.0.3.bin.uu" \
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compile-with "${NORMAL_FW}" \
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no-obj no-implicit-rule \
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clean "t6fw.fw"
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File diff suppressed because it is too large
Load Diff
9881
sys/dev/cxgbe/firmware/t4fw-1.22.0.3.bin.uu
Normal file
9881
sys/dev/cxgbe/firmware/t4fw-1.22.0.3.bin.uu
Normal file
File diff suppressed because it is too large
Load Diff
@ -110,6 +110,7 @@ enum fw_wr_opcodes {
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FW_OFLD_TX_DATA_WR = 0x0b,
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FW_CMD_WR = 0x10,
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FW_ETH_TX_PKT_VM_WR = 0x11,
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FW_ETH_TX_PKTS_VM_WR = 0x12,
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FW_RI_RES_WR = 0x0c,
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FW_RI_RDMA_WRITE_WR = 0x14,
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FW_RI_SEND_WR = 0x15,
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@ -427,6 +428,20 @@ struct fw_filter2_wr {
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(((x) >> S_FW_FILTER_WR_DEL_FILTER) & M_FW_FILTER_WR_DEL_FILTER)
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#define F_FW_FILTER_WR_DEL_FILTER V_FW_FILTER_WR_DEL_FILTER(1U)
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#define S_FW_FILTER2_WR_DROP_ENCAP 30
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#define M_FW_FILTER2_WR_DROP_ENCAP 0x1
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#define V_FW_FILTER2_WR_DROP_ENCAP(x) ((x) << S_FW_FILTER2_WR_DROP_ENCAP)
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#define G_FW_FILTER2_WR_DROP_ENCAP(x) \
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(((x) >> S_FW_FILTER2_WR_DROP_ENCAP) & M_FW_FILTER2_WR_DROP_ENCAP)
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#define F_FW_FILTER2_WR_DROP_ENCAP V_FW_FILTER2_WR_DROP_ENCAP(1U)
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#define S_FW_FILTER2_WR_TX_LOOP 29
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#define M_FW_FILTER2_WR_TX_LOOP 0x1
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#define V_FW_FILTER2_WR_TX_LOOP(x) ((x) << S_FW_FILTER2_WR_TX_LOOP)
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#define G_FW_FILTER2_WR_TX_LOOP(x) \
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(((x) >> S_FW_FILTER2_WR_TX_LOOP) & M_FW_FILTER2_WR_TX_LOOP)
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#define F_FW_FILTER2_WR_TX_LOOP V_FW_FILTER2_WR_TX_LOOP(1U)
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#define S_FW_FILTER_WR_RPTTID 25
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#define M_FW_FILTER_WR_RPTTID 0x1
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#define V_FW_FILTER_WR_RPTTID(x) ((x) << S_FW_FILTER_WR_RPTTID)
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@ -1161,6 +1176,19 @@ struct fw_eth_tx_pkt_vm_wr {
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__be16 vlantci;
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};
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struct fw_eth_tx_pkts_vm_wr {
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__be32 op_pkd;
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__be32 equiq_to_len16;
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__be32 r3;
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__be16 plen;
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__u8 npkt;
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__u8 r4;
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__u8 ethmacdst[6];
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__u8 ethmacsrc[6];
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__be16 ethtype;
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__be16 vlantci;
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};
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/******************************************************************************
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* R I W O R K R E Q U E S T s
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**************************************/
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@ -1831,7 +1859,9 @@ struct fw_ri_rdma_write_cmpl_wr {
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__u16 wrid;
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__u8 r1[3];
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__u8 len16;
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__u32 r2;
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__u8 r2;
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__u8 flags_send;
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__u16 wrid_send;
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__be32 stag_inv;
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__be32 plen;
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__be32 stag_sink;
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@ -4766,6 +4796,8 @@ enum fw_params_param_dev {
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FW_PARAMS_PARAM_DEV_RING_BACKBONE = 0x22,
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FW_PARAMS_PARAM_DEV_PPOD_EDRAM = 0x23,
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FW_PARAMS_PARAM_DEV_RI_WRITE_CMPL_WR = 0x24,
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FW_PARAMS_PARAM_DEV_ADD_SMAC = 0x25,
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FW_PARAMS_PARAM_DEV_HPFILTER_REGION_SUPPORT = 0x26,
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};
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/*
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@ -4858,6 +4890,7 @@ enum fw_params_param_pfvf {
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FW_PARAMS_PARAM_PFVF_PORT_CAPS32 = 0x3A,
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FW_PARAMS_PARAM_PFVF_PPOD_EDRAM_START = 0x3B,
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FW_PARAMS_PARAM_PFVF_PPOD_EDRAM_END = 0x3C,
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FW_PARAMS_PARAM_PFVF_MAX_PKTS_PER_ETH_TX_PKTS_WR = 0x3D,
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};
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/*
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@ -6588,6 +6621,13 @@ struct fw_vi_mac_cmd {
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(((x) >> S_FW_VI_MAC_CMD_FREEMACS) & M_FW_VI_MAC_CMD_FREEMACS)
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#define F_FW_VI_MAC_CMD_FREEMACS V_FW_VI_MAC_CMD_FREEMACS(1U)
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#define S_FW_VI_MAC_CMD_IS_SMAC 30
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#define M_FW_VI_MAC_CMD_IS_SMAC 0x1
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#define V_FW_VI_MAC_CMD_IS_SMAC(x) ((x) << S_FW_VI_MAC_CMD_IS_SMAC)
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#define G_FW_VI_MAC_CMD_IS_SMAC(x) \
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(((x) >> S_FW_VI_MAC_CMD_IS_SMAC) & M_FW_VI_MAC_CMD_IS_SMAC)
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#define F_FW_VI_MAC_CMD_IS_SMAC V_FW_VI_MAC_CMD_IS_SMAC(1U)
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#define S_FW_VI_MAC_CMD_ENTRY_TYPE 23
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#define M_FW_VI_MAC_CMD_ENTRY_TYPE 0x7
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#define V_FW_VI_MAC_CMD_ENTRY_TYPE(x) ((x) << S_FW_VI_MAC_CMD_ENTRY_TYPE)
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@ -6658,6 +6698,19 @@ struct fw_vi_mac_cmd {
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#define G_FW_VI_MAC_CMD_VNI(x) \
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(((x) >> S_FW_VI_MAC_CMD_VNI) & M_FW_VI_MAC_CMD_VNI)
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/* Extracting loopback port number passed from driver.
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* as a part of fw_vi_mac_vni For non loopback entries
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* ignore the field and update port number from flowc.
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* Fw will ignore if physical port number received.
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* expected range (4-7).
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*/
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#define S_FW_VI_MAC_CMD_PORT 24
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#define M_FW_VI_MAC_CMD_PORT 0x7
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#define V_FW_VI_MAC_CMD_PORT(x) ((x) << S_FW_VI_MAC_CMD_PORT)
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#define G_FW_VI_MAC_CMD_PORT(x) \
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(((x) >> S_FW_VI_MAC_CMD_PORT) & M_FW_VI_MAC_CMD_PORT)
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#define S_FW_VI_MAC_CMD_VNI_MASK 0
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#define M_FW_VI_MAC_CMD_VNI_MASK 0xffffff
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#define V_FW_VI_MAC_CMD_VNI_MASK(x) ((x) << S_FW_VI_MAC_CMD_VNI_MASK)
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@ -6933,6 +6986,20 @@ struct fw_acl_vlan_cmd {
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(((x) >> S_FW_ACL_VLAN_CMD_EN) & M_FW_ACL_VLAN_CMD_EN)
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#define F_FW_ACL_VLAN_CMD_EN V_FW_ACL_VLAN_CMD_EN(1U)
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#define S_FW_ACL_VLAN_CMD_TRANSPARENT 30
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#define M_FW_ACL_VLAN_CMD_TRANSPARENT 0x1
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#define V_FW_ACL_VLAN_CMD_TRANSPARENT(x) \
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((x) << S_FW_ACL_VLAN_CMD_TRANSPARENT)
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#define G_FW_ACL_VLAN_CMD_TRANSPARENT(x) \
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(((x) >> S_FW_ACL_VLAN_CMD_TRANSPARENT) & M_FW_ACL_VLAN_CMD_TRANSPARENT)
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#define F_FW_ACL_VLAN_CMD_TRANSPARENT V_FW_ACL_VLAN_CMD_TRANSPARENT(1U)
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#define S_FW_ACL_VLAN_CMD_PMASK 16
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#define M_FW_ACL_VLAN_CMD_PMASK 0xf
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#define V_FW_ACL_VLAN_CMD_PMASK(x) ((x) << S_FW_ACL_VLAN_CMD_PMASK)
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#define G_FW_ACL_VLAN_CMD_PMASK(x) \
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(((x) >> S_FW_ACL_VLAN_CMD_PMASK) & M_FW_ACL_VLAN_CMD_PMASK)
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#define S_FW_ACL_VLAN_CMD_DROPNOVLAN 7
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#define M_FW_ACL_VLAN_CMD_DROPNOVLAN 0x1
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#define V_FW_ACL_VLAN_CMD_DROPNOVLAN(x) ((x) << S_FW_ACL_VLAN_CMD_DROPNOVLAN)
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@ -7256,13 +7323,15 @@ struct fw_port_cmd {
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struct fw_port_dcb_pfc {
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__u8 type;
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__u8 pfcen;
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__u8 r10[5];
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__u8 apply_pkd;
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__u8 r10_lo[4];
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__u8 max_pfc_tcs;
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__be64 r11;
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} pfc;
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struct fw_port_app_priority {
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__u8 type;
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__u8 r10[2];
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__u8 apply_pkd;
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__u8 r10_lo;
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__u8 idx;
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__u8 user_prio_map;
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__u8 sel_field;
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@ -9741,19 +9810,19 @@ enum fw_hdr_chip {
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enum {
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T4FW_VERSION_MAJOR = 0x01,
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T4FW_VERSION_MINOR = 0x13,
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T4FW_VERSION_MICRO = 0x01,
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T4FW_VERSION_BUILD = 0x00,
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T4FW_VERSION_MINOR = 0x16,
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T4FW_VERSION_MICRO = 0x00,
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T4FW_VERSION_BUILD = 0x03,
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T5FW_VERSION_MAJOR = 0x01,
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T5FW_VERSION_MINOR = 0x13,
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T5FW_VERSION_MICRO = 0x01,
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T5FW_VERSION_BUILD = 0x00,
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T5FW_VERSION_MINOR = 0x16,
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T5FW_VERSION_MICRO = 0x00,
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T5FW_VERSION_BUILD = 0x03,
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T6FW_VERSION_MAJOR = 0x01,
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T6FW_VERSION_MINOR = 0x13,
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T6FW_VERSION_MICRO = 0x01,
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T6FW_VERSION_BUILD = 0x00,
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T6FW_VERSION_MINOR = 0x16,
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T6FW_VERSION_MICRO = 0x00,
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T6FW_VERSION_BUILD = 0x03,
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};
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enum {
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File diff suppressed because it is too large
Load Diff
11417
sys/dev/cxgbe/firmware/t5fw-1.22.0.3.bin.uu
Normal file
11417
sys/dev/cxgbe/firmware/t5fw-1.22.0.3.bin.uu
Normal file
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
12235
sys/dev/cxgbe/firmware/t6fw-1.22.0.3.bin.uu
Normal file
12235
sys/dev/cxgbe/firmware/t6fw-1.22.0.3.bin.uu
Normal file
File diff suppressed because it is too large
Load Diff
@ -17,7 +17,7 @@ FIRMWS+= ${F}:${F:C/.txt//}:1.0.0.0
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.endif
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.endfor
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T4FW_VER= 1.19.1.0
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T4FW_VER= 1.22.0.3
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FIRMWS+= t4fw.fw:t4fw:${T4FW_VER}
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CLEANFILES+= t4fw.fw
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@ -17,7 +17,7 @@ FIRMWS+= ${F}:${F:C/.txt//}:1.0.0.0
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.endif
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.endfor
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T5FW_VER= 1.19.1.0
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T5FW_VER= 1.22.0.3
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FIRMWS+= t5fw.fw:t5fw:${T5FW_VER}
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CLEANFILES+= t5fw.fw
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@ -17,7 +17,7 @@ FIRMWS+= ${F}:${F:C/.txt//}:1.0.0.0
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.endif
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.endfor
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T6FW_VER= 1.19.1.0
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T6FW_VER= 1.22.0.3
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FIRMWS+= t6fw.fw:t6fw:${T6FW_VER}
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CLEANFILES+= t6fw.fw
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