Merged from sys/i386/isa/npx.c revision 1.84.
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@ -280,6 +280,12 @@ npx_probe(dev)
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setidt(16, probetrap, SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
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setidt(16, probetrap, SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
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setidt(npx_intrno, probeintr, SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
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setidt(npx_intrno, probeintr, SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
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npx_idt_probeintr = idt[npx_intrno];
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npx_idt_probeintr = idt[npx_intrno];
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/*
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* XXX This looks highly bogus, but it appears that npc_probe1
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* needs interrupts enabled. Does this make any difference
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* here?
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*/
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enable_intr();
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enable_intr();
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result = npx_probe1(dev);
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result = npx_probe1(dev);
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disable_intr();
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disable_intr();
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@ -853,7 +859,7 @@ npxdna()
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/*
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/*
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* Record new context early in case frstor causes an IRQ13.
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* Record new context early in case frstor causes an IRQ13.
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*/
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*/
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npxproc = curproc;
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PCPU_SET(npxproc, CURPROC);
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curpcb->pcb_savefpu.sv_ex_sw = 0;
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curpcb->pcb_savefpu.sv_ex_sw = 0;
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/*
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/*
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* The following frstor may cause an IRQ13 when the state being
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* The following frstor may cause an IRQ13 when the state being
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@ -890,16 +896,18 @@ npxsave(addr)
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fnsave(addr);
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fnsave(addr);
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/* fnop(); */
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/* fnop(); */
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start_emulating();
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start_emulating();
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npxproc = NULL;
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PCPU_SET(npxproc, NULL);
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#else /* SMP */
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#else /* SMP */
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int intrstate;
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u_char icu1_mask;
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u_char icu1_mask;
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u_char icu2_mask;
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u_char icu2_mask;
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u_char old_icu1_mask;
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u_char old_icu1_mask;
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u_char old_icu2_mask;
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u_char old_icu2_mask;
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struct gate_descriptor save_idt_npxintr;
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struct gate_descriptor save_idt_npxintr;
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intrstate = save_intr();
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disable_intr();
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disable_intr();
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#ifdef PC98
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#ifdef PC98
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old_icu1_mask = inb(IO_ICU1 + 2);
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old_icu1_mask = inb(IO_ICU1 + 2);
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@ -917,12 +925,12 @@ npxsave(addr)
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outb(IO_ICU2 + 1, old_icu2_mask & ~(npx0_imask >> 8));
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outb(IO_ICU2 + 1, old_icu2_mask & ~(npx0_imask >> 8));
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#endif
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#endif
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idt[npx_intrno] = npx_idt_probeintr;
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idt[npx_intrno] = npx_idt_probeintr;
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enable_intr();
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write_eflags(intrstate);
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stop_emulating();
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stop_emulating();
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fnsave(addr);
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fnsave(addr);
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fnop();
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fnop();
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start_emulating();
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start_emulating();
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npxproc = NULL;
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PCPU_SET(npxproc, NULL);
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disable_intr();
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disable_intr();
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#ifdef PC98
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#ifdef PC98
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icu1_mask = inb(IO_ICU1 + 2); /* masks may have changed */
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icu1_mask = inb(IO_ICU1 + 2); /* masks may have changed */
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@ -942,7 +950,7 @@ npxsave(addr)
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| (old_icu2_mask & (npx0_imask >> 8)));
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| (old_icu2_mask & (npx0_imask >> 8)));
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#endif
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#endif
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idt[npx_intrno] = save_idt_npxintr;
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idt[npx_intrno] = save_idt_npxintr;
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enable_intr(); /* back to usual state */
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restore_intr(intrstate); /* back to previous state */
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#endif /* SMP */
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#endif /* SMP */
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}
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}
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