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In the PCI error interrupt handler, specify the width of the PCI configuration

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cycle using the correct argument.  The location and width were reversed.

MFC in: 2 days
This commit is contained in:
Justin T. Gibbs 2004-08-22 14:02:43 +00:00
parent 4ddea3e2d4
commit 25edba1e56
1 changed files with 7 additions and 6 deletions
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13
sys/dev/aic7xxx/aic7xxx_pci.c
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@ -2119,12 +2119,13 @@ ahc_pci_resume(struct ahc_softc *ahc)
* that the OS doesn't know about and rely on our chip
* reset handler to handle the rest.
*/
aic_pci_write_config(ahc->dev_softc, DEVCONFIG, /*bytes*/4,
ahc->bus_softc.pci_softc.devconfig);
aic_pci_write_config(ahc->dev_softc, PCIR_COMMAND, /*bytes*/1,
ahc->bus_softc.pci_softc.command);
aic_pci_write_config(ahc->dev_softc, CSIZE_LATTIME, /*bytes*/1,
ahc->bus_softc.pci_softc.csize_lattime);
aic_pci_write_config(ahc->dev_softc, DEVCONFIG,
ahc->bus_softc.pci_softc.devconfig, /*bytes*/4);
aic_pci_write_config(ahc->dev_softc, PCIR_COMMAND,
ahc->bus_softc.pci_softc.command, /*bytes*/1);
aic_pci_write_config(ahc->dev_softc, CSIZE_LATTIME,
ahc->bus_softc.pci_softc.csize_lattime,
/*bytes*/1);
if ((ahc->flags & AHC_HAS_TERM_LOGIC) != 0) {
struct seeprom_descriptor sd;
u_int sxfrctl1;