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For BERI on NetFPGA assume HZ=100 by default.

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Remove the uart support in favour of a "jtag-uart" interface imitation
providing a much simpler interface, directly exported to the host,
allowing the toolchain to be shared with BERI on Altera. [1]

Submitted by:	Jong Hun HAN (jong.han cl.cam.ac.uk) [1]
MFC after:	2 weeks
This commit is contained in:
bz 2014-03-22 13:06:32 +00:00
parent 3bc7f167e0
commit 260ba47599
2 changed files with 13 additions and 1 deletions
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9
sys/boot/fdt/dts/mips/beri-netfpga.dts
View File

@ -113,6 +113,14 @@
soft-interrupt-sources = <64>;
};
serial0: serial@7f000000 {
compatible = "altera,jtag_uart-11_0";
reg = <0x7f000000 0x40>;
interrupts = <0>;
interrupt-parent = <&beripic>;
};
/*
serial0: serial@7f002100 {
compatible = "ns16550";
reg = <0x7f002100 0x20>;
@ -121,6 +129,7 @@
interrupts = <8>;
interrupt-parent = <&beripic>;
};
*/
};
aliases {

5
sys/mips/conf/BERI_NETFPGA_MDROOT
View File

@ -10,11 +10,14 @@ include "BERI_TEMPLATE"
ident BERI_NETFPGA_MDROOT
options HZ=100
options FDT
options FDT_DTB_STATIC
makeoptions FDT_DTS_FILE=beri-netfpga.dts
device uart
#device uart
device altera_jtag_uart
#
# This kernel configuration uses an embedded memory root file system.