Make the FIFO configuration a bit more flexible for the DWC OTG in
device side mode.
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dfad72a7d7
commit
2624de5c56
@ -297,32 +297,29 @@ dwc_otg_init_fifo(struct dwc_otg_softc *sc, uint8_t mode)
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if (x < sc->sc_dev_in_ep_max) {
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uint32_t limit;
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limit = (x == 1) ? DWC_OTG_MAX_TXN :
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(DWC_OTG_MAX_TXN / 2);
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limit = (x == 1) ? MIN(DWC_OTG_TX_MAX_FIFO_SIZE,
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DWC_OTG_MAX_TXN) : MIN(DWC_OTG_MAX_TXN / 2,
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DWC_OTG_TX_MAX_FIFO_SIZE);
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if (fifo_size >= limit) {
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DWC_OTG_WRITE_4(sc, DOTG_DIEPTXF(x),
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((limit / 4) << 16) |
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(tx_start / 4));
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tx_start += limit;
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fifo_size -= limit;
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pf->usb.max_in_frame_size = 0x200;
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pf->usb.support_in = 1;
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/* see if there is enough FIFO space */
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if (limit <= fifo_size) {
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pf->max_buffer = limit;
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} else if (fifo_size >= 0x80) {
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DWC_OTG_WRITE_4(sc, DOTG_DIEPTXF(x),
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((0x80 / 4) << 16) | (tx_start / 4));
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tx_start += 0x80;
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fifo_size -= 0x80;
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pf->usb.max_in_frame_size = 0x40;
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pf->usb.support_in = 1;
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} else {
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pf->usb.is_simplex = 1;
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DWC_OTG_WRITE_4(sc, DOTG_DIEPTXF(x),
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(0x0 << 16) | (tx_start / 4));
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limit = MIN(DWC_OTG_TX_MAX_FIFO_SIZE, 0x40);
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if (limit <= fifo_size) {
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pf->usb.support_in = 1;
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} else {
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pf->usb.is_simplex = 1;
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limit = 0;
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}
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}
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/* set FIFO size */
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DWC_OTG_WRITE_4(sc, DOTG_DIEPTXF(x),
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((limit / 4) << 16) | (tx_start / 4));
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tx_start += limit;
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fifo_size -= limit;
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pf->usb.max_in_frame_size = limit;
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} else {
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pf->usb.is_simplex = 1;
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}
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@ -38,6 +38,9 @@
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#define DWC_OTG_SLOT_IDLE_MAX 3
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#define DWC_OTG_SLOT_IDLE_MIN 2
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#define DWC_OTG_NAK_MAX 8 /* 1 ms */
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#ifndef DWC_OTG_TX_MAX_FIFO_SIZE
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#define DWC_OTG_TX_MAX_FIFO_SIZE DWC_OTG_MAX_TXN
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#endif
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#define DWC_OTG_READ_4(sc, reg) \
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bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, reg)
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