Add support for the UART device found in lowRISC system-on-a-chip.
The only source of documentation for this device is verilog, so driver is minimalistic. Reviewed by: Dr Jonathan Kimmitt <jrrk2@cam.ac.uk> Approved by: re (kib) Sponsored by: DARPA, AFRL
This commit is contained in:
br
parent
aa54e1afb1
commit
28121099e2
@ -7,6 +7,7 @@ crypto/blowfish/bf_enc.c optional crypto | ipsec | ipsec_support
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crypto/des/des_enc.c optional crypto | ipsec | ipsec_support | netsmb
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dev/ofw/ofw_cpu.c optional fdt
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dev/uart/uart_cpu_fdt.c optional uart fdt
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dev/uart/uart_dev_lowrisc.c optional uart_lowrisc
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dev/xilinx/axi_quad_spi.c optional xilinx_spi
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kern/kern_clocksource.c standard
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kern/msi_if.m standard
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393
sys/dev/uart/uart_dev_lowrisc.c
Normal file
393
sys/dev/uart/uart_dev_lowrisc.c
Normal file
@ -0,0 +1,393 @@
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/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2018 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* This software was developed by SRI International and the University of
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* Cambridge Computer Laboratory (Department of Computer Science and
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* Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
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* DARPA SSITH research programme.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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||||
* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_ddb.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/kdb.h>
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#include <machine/bus.h>
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#include <machine/sbi.h>
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#include <dev/uart/uart.h>
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#include <dev/uart/uart_cpu.h>
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#include <dev/uart/uart_cpu_fdt.h>
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#include <dev/uart/uart_bus.h>
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#include <dev/uart/uart_dev_lowrisc.h>
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#include "uart_if.h"
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#define DEFAULT_BAUD_RATE 115200
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/*
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* Low-level UART interface.
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*/
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static int lowrisc_uart_probe(struct uart_bas *bas);
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static void lowrisc_uart_init(struct uart_bas *bas, int, int, int, int);
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static void lowrisc_uart_term(struct uart_bas *bas);
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static void lowrisc_uart_putc(struct uart_bas *bas, int);
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static int lowrisc_uart_rxready(struct uart_bas *bas);
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static int lowrisc_uart_getc(struct uart_bas *bas, struct mtx *);
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static struct uart_ops uart_lowrisc_uart_ops = {
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.probe = lowrisc_uart_probe,
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.init = lowrisc_uart_init,
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.term = lowrisc_uart_term,
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.putc = lowrisc_uart_putc,
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.rxready = lowrisc_uart_rxready,
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.getc = lowrisc_uart_getc,
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};
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static int
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lowrisc_uart_probe(struct uart_bas *bas)
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{
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return (0);
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}
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static u_int
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lowrisc_uart_getbaud(struct uart_bas *bas)
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{
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return (DEFAULT_BAUD_RATE);
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}
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static void
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lowrisc_uart_init(struct uart_bas *bas, int baudrate, int databits,
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int stopbits, int parity)
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{
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/* TODO */
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}
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static void
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lowrisc_uart_term(struct uart_bas *bas)
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{
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/* TODO */
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}
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static void
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lowrisc_uart_putc(struct uart_bas *bas, int c)
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{
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while (GETREG(bas, UART_DR) & DR_TX_FIFO_FULL)
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;
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SETREG(bas, UART_DR, c);
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}
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static int
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lowrisc_uart_rxready(struct uart_bas *bas)
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{
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if (GETREG(bas, UART_DR) & DR_RX_FIFO_EMPTY)
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return (0);
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return (1);
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}
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static int
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lowrisc_uart_getc(struct uart_bas *bas, struct mtx *hwmtx)
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{
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uint32_t reg;
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uart_lock(hwmtx);
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SETREG(bas, UART_INT_STATUS, INT_STATUS_ACK);
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reg = GETREG(bas, UART_DR);
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uart_unlock(hwmtx);
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return (reg & 0xff);
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}
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/*
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* High-level UART interface.
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*/
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struct lowrisc_uart_softc {
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struct uart_softc base;
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};
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static int lowrisc_uart_bus_attach(struct uart_softc *);
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static int lowrisc_uart_bus_detach(struct uart_softc *);
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static int lowrisc_uart_bus_flush(struct uart_softc *, int);
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static int lowrisc_uart_bus_getsig(struct uart_softc *);
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static int lowrisc_uart_bus_ioctl(struct uart_softc *, int, intptr_t);
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static int lowrisc_uart_bus_ipend(struct uart_softc *);
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static int lowrisc_uart_bus_param(struct uart_softc *, int, int, int, int);
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static int lowrisc_uart_bus_probe(struct uart_softc *);
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static int lowrisc_uart_bus_receive(struct uart_softc *);
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static int lowrisc_uart_bus_setsig(struct uart_softc *, int);
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static int lowrisc_uart_bus_transmit(struct uart_softc *);
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static void lowrisc_uart_bus_grab(struct uart_softc *);
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static void lowrisc_uart_bus_ungrab(struct uart_softc *);
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static kobj_method_t lowrisc_uart_methods[] = {
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KOBJMETHOD(uart_attach, lowrisc_uart_bus_attach),
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KOBJMETHOD(uart_detach, lowrisc_uart_bus_detach),
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KOBJMETHOD(uart_flush, lowrisc_uart_bus_flush),
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KOBJMETHOD(uart_getsig, lowrisc_uart_bus_getsig),
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KOBJMETHOD(uart_ioctl, lowrisc_uart_bus_ioctl),
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KOBJMETHOD(uart_ipend, lowrisc_uart_bus_ipend),
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KOBJMETHOD(uart_param, lowrisc_uart_bus_param),
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KOBJMETHOD(uart_probe, lowrisc_uart_bus_probe),
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KOBJMETHOD(uart_receive, lowrisc_uart_bus_receive),
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KOBJMETHOD(uart_setsig, lowrisc_uart_bus_setsig),
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KOBJMETHOD(uart_transmit, lowrisc_uart_bus_transmit),
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KOBJMETHOD(uart_grab, lowrisc_uart_bus_grab),
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KOBJMETHOD(uart_ungrab, lowrisc_uart_bus_ungrab),
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{ 0, 0 }
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};
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static struct uart_class uart_lowrisc_class = {
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"lowrisc",
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lowrisc_uart_methods,
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sizeof(struct lowrisc_uart_softc),
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.uc_ops = &uart_lowrisc_uart_ops,
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.uc_range = 0x100,
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.uc_rclk = 12500000, /* TODO: get value from clock manager */
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.uc_rshift = 0
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};
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static struct ofw_compat_data compat_data[] = {
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{"lowrisc-fake", (uintptr_t)&uart_lowrisc_class},
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{NULL, (uintptr_t)NULL},
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};
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UART_FDT_CLASS_AND_DEVICE(compat_data);
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static int
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lowrisc_uart_bus_attach(struct uart_softc *sc)
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{
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struct uart_bas *bas;
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struct uart_devinfo *di;
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bas = &sc->sc_bas;
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if (sc->sc_sysdev != NULL) {
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di = sc->sc_sysdev;
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lowrisc_uart_init(bas, di->baudrate, di->databits, di->stopbits,
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di->parity);
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} else
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lowrisc_uart_init(bas, DEFAULT_BAUD_RATE, 8, 1, 0);
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(void)lowrisc_uart_bus_getsig(sc);
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/* TODO: clear all pending interrupts. */
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return (0);
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}
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static int
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lowrisc_uart_bus_detach(struct uart_softc *sc)
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{
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/* TODO */
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return (0);
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}
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static int
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lowrisc_uart_bus_flush(struct uart_softc *sc, int what)
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{
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/* TODO */
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return (0);
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}
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static int
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lowrisc_uart_bus_getsig(struct uart_softc *sc)
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{
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/* TODO */
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return (0);
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}
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static int
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lowrisc_uart_bus_ioctl(struct uart_softc *sc, int request, intptr_t data)
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{
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struct uart_bas *bas;
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int error;
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bas = &sc->sc_bas;
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error = 0;
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uart_lock(sc->sc_hwmtx);
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switch (request) {
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case UART_IOCTL_BREAK:
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/* TODO */
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break;
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case UART_IOCTL_BAUD:
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*(u_int*)data = lowrisc_uart_getbaud(bas);
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break;
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default:
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error = EINVAL;
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break;
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}
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uart_unlock(sc->sc_hwmtx);
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return (error);
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}
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static int
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lowrisc_uart_bus_ipend(struct uart_softc *sc)
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{
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struct uart_bas *bas;
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int ipend;
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bas = &sc->sc_bas;
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ipend = 0;
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uart_lock(sc->sc_hwmtx);
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if ((GETREG(bas, UART_DR) & DR_RX_FIFO_EMPTY) == 0)
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ipend |= SER_INT_RXREADY;
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SETREG(bas, UART_INT_STATUS, INT_STATUS_ACK);
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uart_unlock(sc->sc_hwmtx);
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return (ipend);
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}
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static int
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lowrisc_uart_bus_param(struct uart_softc *sc, int baudrate, int databits,
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int stopbits, int parity)
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{
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uart_lock(sc->sc_hwmtx);
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lowrisc_uart_init(&sc->sc_bas, baudrate, databits, stopbits, parity);
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uart_unlock(sc->sc_hwmtx);
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return (0);
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}
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static int
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lowrisc_uart_bus_probe(struct uart_softc *sc)
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{
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int error;
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error = lowrisc_uart_probe(&sc->sc_bas);
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if (error)
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return (error);
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/*
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* On input we can read up to the full fifo size at once. On output, we
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* want to write only as much as the programmed tx low water level,
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* because that's all we can be certain we have room for in the fifo
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* when we get a tx-ready interrupt.
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*/
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sc->sc_rxfifosz = 2048;
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sc->sc_txfifosz = 2048;
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device_set_desc(sc->sc_dev, "lowRISC UART");
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return (0);
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}
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static int
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lowrisc_uart_bus_receive(struct uart_softc *sc)
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{
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struct uart_bas *bas;
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uint32_t reg;
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bas = &sc->sc_bas;
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uart_lock(sc->sc_hwmtx);
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do {
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if (uart_rx_full(sc)) {
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/* No space left in the input buffer */
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sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN;
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break;
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}
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reg = GETREG(bas, UART_DR);
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SETREG(bas, UART_INT_STATUS, INT_STATUS_ACK);
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uart_rx_put(sc, reg & 0xff);
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} while ((reg & DR_RX_FIFO_EMPTY) == 0);
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uart_unlock(sc->sc_hwmtx);
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return (0);
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}
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static int
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lowrisc_uart_bus_setsig(struct uart_softc *sc, int sig)
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{
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return (0);
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}
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static int
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lowrisc_uart_bus_transmit(struct uart_softc *sc)
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{
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struct uart_bas *bas;
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int i;
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bas = &sc->sc_bas;
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uart_lock(sc->sc_hwmtx);
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for (i = 0; i < sc->sc_txdatasz; i++) {
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while (GETREG(bas, UART_DR) & DR_TX_FIFO_FULL)
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;
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SETREG(bas, UART_DR, sc->sc_txbuf[i] & 0xff);
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}
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uart_unlock(sc->sc_hwmtx);
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return (0);
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}
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static void
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lowrisc_uart_bus_grab(struct uart_softc *sc)
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{
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struct uart_bas *bas;
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bas = &sc->sc_bas;
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uart_lock(sc->sc_hwmtx);
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/* TODO */
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uart_unlock(sc->sc_hwmtx);
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}
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static void
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lowrisc_uart_bus_ungrab(struct uart_softc *sc)
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{
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struct uart_bas *bas;
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bas = &sc->sc_bas;
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uart_lock(sc->sc_hwmtx);
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/* TODO */
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uart_unlock(sc->sc_hwmtx);
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}
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66
sys/dev/uart/uart_dev_lowrisc.h
Normal file
66
sys/dev/uart/uart_dev_lowrisc.h
Normal file
@ -0,0 +1,66 @@
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/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
|
||||
* Copyright (c) 2018 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
|
||||
*
|
||||
* This software was developed by SRI International and the University of
|
||||
* Cambridge Computer Laboratory (Department of Computer Science and
|
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* Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
|
||||
* DARPA SSITH research programme.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
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#ifndef _UART_DEV_LOWRISC_H_
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#define _UART_DEV_LOWRISC_H_
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#define UART_DR 0x0000
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#define DR_DATA_S 0
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#define DR_DATA_M 0xff
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#define DR_RX_ERR (1 << 8)
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#define DR_RX_FIFO_EMPTY (1 << 9)
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#define DR_TX_FIFO_FULL (1 << 10)
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#define DR_RX_FIFO_FULL (1 << 11)
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#define UART_INT_STATUS 0x1000
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#define INT_STATUS_ACK 1
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#define UART_BAUD 0x2000 /* write-only */
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#define BAUD_115200 108
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#define UART_STAT_RX 0x2000 /* read-only */
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#define STAT_RX_FIFO_RD_COUNT_S 0
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#define STAT_RX_FIFO_RD_COUNT_M (0xffff << STAT_RX_FIFO_RD_COUNT_S)
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#define STAT_RX_FIFO_WR_COUNT_S 16
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#define STAT_RX_FIFO_WR_COUNT_M (0xffff << STAT_RX_FIFO_WR_COUNT_S)
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#define UART_STAT_TX 0x2004
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#define STAT_TX_FIFO_RD_COUNT_S 0
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#define STAT_TX_FIFO_RD_COUNT_M (0xffff << STAT_TX_FIFO_RD_COUNT_S)
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#define STAT_TX_FIFO_WR_COUNT_S 16
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||||
#define STAT_TX_FIFO_WR_COUNT_M (0xffff << STAT_TX_FIFO_WR_COUNT_S)
|
||||
|
||||
#define GETREG(bas, reg) \
|
||||
bus_space_read_2((bas)->bst, (bas)->bsh, (reg))
|
||||
#define SETREG(bas, reg, value) \
|
||||
bus_space_write_2((bas)->bst, (bas)->bsh, (reg), (value))
|
||||
|
||||
#endif /* _UART_DEV_LOWRISC_H_ */
|
||||
@ -99,6 +99,7 @@ device virtio_mmio # VirtIO MMIO bus
|
||||
|
||||
# Serial (COM) ports
|
||||
device uart # Generic UART driver
|
||||
device uart_lowrisc # lowRISC UART driver
|
||||
device uart_ns8250 # ns8250-type UART driver
|
||||
|
||||
# Uncomment for memory disk
|
||||
|
||||
Loading…
Reference in New Issue
Block a user