Move intr_describe() out of #ifdef SMP; the function is always required.
Reviewed by: jhb
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a1878de77c
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2892f80896
@ -400,6 +400,23 @@ atpic_reset(void)
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}
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#endif
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/* Add a description to an active interrupt handler. */
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int
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intr_describe(u_int vector, void *ih, const char *descr)
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{
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struct intsrc *isrc;
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int error;
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isrc = intr_lookup_source(vector);
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if (isrc == NULL)
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return (EINVAL);
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error = intr_event_describe_handler(isrc->is_event, ih, descr);
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if (error)
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return (error);
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intrcnt_updatename(isrc);
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return (0);
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}
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#ifdef DDB
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/*
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* Dump data about interrupt handlers
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@ -466,23 +483,6 @@ intr_bind(u_int vector, u_char cpu)
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return (intr_event_bind(isrc->is_event, cpu));
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}
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/* Add a description to an active interrupt handler. */
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int
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intr_describe(u_int vector, void *ih, const char *descr)
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{
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struct intsrc *isrc;
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int error;
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isrc = intr_lookup_source(vector);
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if (isrc == NULL)
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return (EINVAL);
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error = intr_event_describe_handler(isrc->is_event, ih, descr);
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if (error)
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return (error);
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intrcnt_updatename(isrc);
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return (0);
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}
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/*
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* Add a CPU to our mask of valid CPUs that can be destinations of
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* interrupts.
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@ -366,6 +366,23 @@ intr_init(void *dummy __unused)
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}
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SYSINIT(intr_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_init, NULL);
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/* Add a description to an active interrupt handler. */
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int
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intr_describe(u_int vector, void *ih, const char *descr)
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{
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struct intsrc *isrc;
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int error;
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isrc = intr_lookup_source(vector);
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if (isrc == NULL)
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return (EINVAL);
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error = intr_event_describe_handler(isrc->is_event, ih, descr);
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if (error)
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return (error);
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intrcnt_updatename(isrc);
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return (0);
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}
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#ifdef DDB
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/*
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* Dump data about interrupt handlers
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@ -432,23 +449,6 @@ intr_bind(u_int vector, u_char cpu)
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return (intr_event_bind(isrc->is_event, cpu));
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}
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/* Add a description to an active interrupt handler. */
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int
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intr_describe(u_int vector, void *ih, const char *descr)
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{
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struct intsrc *isrc;
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int error;
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isrc = intr_lookup_source(vector);
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if (isrc == NULL)
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return (EINVAL);
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error = intr_event_describe_handler(isrc->is_event, ih, descr);
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if (error)
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return (error);
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intrcnt_updatename(isrc);
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return (0);
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}
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/*
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* Add a CPU to our mask of valid CPUs that can be destinations of
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* interrupts.
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