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informal discussion between Bruce Evans <bde@zeta.org.au>,

Browse Source 
Peter Wemm <peter@spinner.DIALix.COM>, Steve Passe <smp@csn.net>

removed all the IPI_INTS code.
made the XFAST_IPI32 code default, renaming Xfastipi32 to Xinvltlb.
This commit is contained in:
Steve Passe 1997-04-27 21:17:56 +00:00
parent b33b5868a5
commit 2897614119
14 changed files with 57 additions and 1022 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

139
sys/amd64/amd64/mp_machdep.c
View File

@ -22,7 +22,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: mp_machdep.c,v 1.47 1997/04/26 08:11:49 peter Exp $
* $Id: mp_machdep.c,v 1.1 1997/04/26 11:45:15 peter Exp $
*/
#include "opt_smp.h"
@ -60,11 +60,6 @@
#include <i386/i386/cons.h> /* cngetc() */
#if defined(IPI_INTS)
#include <i386/isa/isa_device.h>
#include "vector.h"
#endif /* IPI_INTS */
#if defined(SMP_INVLTLB)
#include <i386/isa/icu.h>
#endif /* SMP_INVLTLB */
@ -160,16 +155,6 @@ static int search_for_sig(u_int32_t target, int count);
static int mp_probe(u_int base_top);
static void mp_enable(u_int boot_addr);
#if defined(IPI_INTS)
static void ipi_intr0(void);
static void ipi_intr1(void);
static void ipi_intr2(void);
static void ipi_intr3(void);
static int
ipi_ihandler_attach(int irq, inthand2_t * func,
unsigned *maskptr, int unit);
#endif /* IPI_INTS */
/*
* calculate usable address in base memory for AP trampoline code
@ -325,11 +310,10 @@ static int parse_mp_table(void);
static void default_mp_table(int type);
static int start_all_aps(u_int boot_addr);
#if defined(XFAST_IPI32)
#include <machine/md_var.h>
#include <i386/isa/isa_device.h>
extern void Xfastipi32(u_int, u_int, u_int, u_int);
#endif /* XFAST_IPI32 */
#if defined(APIC_IO)
#include <i386/include/md_var.h> /* setidt() */
#include <i386/isa/isa_device.h> /* Xinvltlb() */
#endif /* APIC_IO */
static void
mp_enable(u_int boot_addr)
@ -367,31 +351,9 @@ mp_enable(u_int boot_addr)
if (io_apic_setup(apic) < 0)
panic("IO APIC setup failure\n");
#if defined(IPI_INTS)
/* setup IPI INTerrupt mechanism */
ipi_ihandler_attach( /* irq */ 24,
/* XXX */ (inthand2_t *) ipi_intr0, NULL, /* unit */ 0);
ipi_ihandler_attach( /* irq */ 25,
/* XXX */ (inthand2_t *) ipi_intr1, NULL, /* unit */ 0);
ipi_ihandler_attach( /* irq */ 26,
/* XXX */ (inthand2_t *) ipi_intr2, NULL, /* unit */ 0);
#if !defined(SMP_INVLTLB)
ipi_ihandler_attach( /* irq */ 27,
/* XXX */ (inthand2_t *) ipi_intr3, NULL, /* unit */ 0);
#else
#if defined(XFAST_IPI32)
ipi_ihandler_attach( /* irq */ 27,
/* XXX */ (inthand2_t *) ipi_intr3, NULL, /* unit */ 0);
setidt(ICU_OFFSET + 32,
Xfastipi32,
/* install an inter-CPU IPI for TLB invalidation */
setidt(ICU_OFFSET + XINVLTLB_OFFSET, Xinvltlb,
SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
#else
ipi_ihandler_attach( /* irq */ 27,
/* XXX */ (inthand2_t *) ipi_invltlb, NULL, /* unit */ 0);
#endif /* XFAST_IPI32 */
#endif
#endif /* IPI_INTS */
#if defined(TEST_UPPERPRIO)
@ -1504,89 +1466,6 @@ start_ap(int logical_cpu, u_int boot_addr)
}
#if defined(IPI_INTS)
static void
ipi_intr0(void)
{
printf("IPI 0\n");
}
static void
ipi_intr1(void)
{
printf("IPI 1\n");
}
static void
ipi_intr2(void)
{
printf("IPI 2\n");
}
static void
ipi_intr3(void)
{
printf("IPI 3\n");
}
/*-----------------------------------------------------------------------
**
** Register an interupt handler for an IPI.
** (Stolen from the PCI<->ISA glue code)
**
**-----------------------------------------------------------------------
*/
static int
ipi_ihandler_attach(int irq, inthand2_t * func, unsigned *maskptr, int unit)
{
char buf[16];
char *cp;
int free_id, id, result;
sprintf(buf, "ipi irq%d", irq);
for (cp = intrnames, free_id = 0, id = 0; id < NR_DEVICES; id++) {
if (strcmp(cp, buf) == 0)
break;
if (free_id <= 0 && strcmp(cp, "ipi irqnn") == 0)
free_id = id;
while (*cp++ != '\0');
}
if (id == NR_DEVICES) {
id = free_id;
if (id == 0) {
/*
* All ipi irq counters are in use, perhaps because
* config is old so there aren't any. Abuse the clk0
* counter.
*/
printf(
"ipi_ihandler_attach: counting ipi irq%d's as clk0 irqs\n",
irq);
}
}
result = register_intr(
irq, /* isa irq */
id, /* device id */
0, /* flags? */
func, /* handler */
maskptr, /* mask pointer */
unit); /* handler arg */
if (result) {
printf("WARNING: ipi_ihandler_attach: result=%d\n", result);
return (result);
};
return (0);
}
#endif /* IPI_INTS */
#ifdef SMP_INVLTLB
/*
* Flush the TLB on all other CPU's
@ -1599,11 +1478,7 @@ smp_invltlb()
{
if (smp_active) {
if (invldebug & 2)
#if defined(XFAST_IPI32)
all_but_self_ipi(ICU_OFFSET + 32);
#else
all_but_self_ipi(ICU_OFFSET + 27);
#endif /* XFAST_IPI32 */
}
}

139
sys/amd64/amd64/mptable.c
View File

@ -22,7 +22,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: mp_machdep.c,v 1.47 1997/04/26 08:11:49 peter Exp $
* $Id: mp_machdep.c,v 1.1 1997/04/26 11:45:15 peter Exp $
*/
#include "opt_smp.h"
@ -60,11 +60,6 @@
#include <i386/i386/cons.h> /* cngetc() */
#if defined(IPI_INTS)
#include <i386/isa/isa_device.h>
#include "vector.h"
#endif /* IPI_INTS */
#if defined(SMP_INVLTLB)
#include <i386/isa/icu.h>
#endif /* SMP_INVLTLB */
@ -160,16 +155,6 @@ static int search_for_sig(u_int32_t target, int count);
static int mp_probe(u_int base_top);
static void mp_enable(u_int boot_addr);
#if defined(IPI_INTS)
static void ipi_intr0(void);
static void ipi_intr1(void);
static void ipi_intr2(void);
static void ipi_intr3(void);
static int
ipi_ihandler_attach(int irq, inthand2_t * func,
unsigned *maskptr, int unit);
#endif /* IPI_INTS */
/*
* calculate usable address in base memory for AP trampoline code
@ -325,11 +310,10 @@ static int parse_mp_table(void);
static void default_mp_table(int type);
static int start_all_aps(u_int boot_addr);
#if defined(XFAST_IPI32)
#include <machine/md_var.h>
#include <i386/isa/isa_device.h>
extern void Xfastipi32(u_int, u_int, u_int, u_int);
#endif /* XFAST_IPI32 */
#if defined(APIC_IO)
#include <i386/include/md_var.h> /* setidt() */
#include <i386/isa/isa_device.h> /* Xinvltlb() */
#endif /* APIC_IO */
static void
mp_enable(u_int boot_addr)
@ -367,31 +351,9 @@ mp_enable(u_int boot_addr)
if (io_apic_setup(apic) < 0)
panic("IO APIC setup failure\n");
#if defined(IPI_INTS)
/* setup IPI INTerrupt mechanism */
ipi_ihandler_attach( /* irq */ 24,
/* XXX */ (inthand2_t *) ipi_intr0, NULL, /* unit */ 0);
ipi_ihandler_attach( /* irq */ 25,
/* XXX */ (inthand2_t *) ipi_intr1, NULL, /* unit */ 0);
ipi_ihandler_attach( /* irq */ 26,
/* XXX */ (inthand2_t *) ipi_intr2, NULL, /* unit */ 0);
#if !defined(SMP_INVLTLB)
ipi_ihandler_attach( /* irq */ 27,
/* XXX */ (inthand2_t *) ipi_intr3, NULL, /* unit */ 0);
#else
#if defined(XFAST_IPI32)
ipi_ihandler_attach( /* irq */ 27,
/* XXX */ (inthand2_t *) ipi_intr3, NULL, /* unit */ 0);
setidt(ICU_OFFSET + 32,
Xfastipi32,
/* install an inter-CPU IPI for TLB invalidation */
setidt(ICU_OFFSET + XINVLTLB_OFFSET, Xinvltlb,
SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
#else
ipi_ihandler_attach( /* irq */ 27,
/* XXX */ (inthand2_t *) ipi_invltlb, NULL, /* unit */ 0);
#endif /* XFAST_IPI32 */
#endif
#endif /* IPI_INTS */
#if defined(TEST_UPPERPRIO)
@ -1504,89 +1466,6 @@ start_ap(int logical_cpu, u_int boot_addr)
}
#if defined(IPI_INTS)
static void
ipi_intr0(void)
{
printf("IPI 0\n");
}
static void
ipi_intr1(void)
{
printf("IPI 1\n");
}
static void
ipi_intr2(void)
{
printf("IPI 2\n");
}
static void
ipi_intr3(void)
{
printf("IPI 3\n");
}
/*-----------------------------------------------------------------------
**
** Register an interupt handler for an IPI.
** (Stolen from the PCI<->ISA glue code)
**
**-----------------------------------------------------------------------
*/
static int
ipi_ihandler_attach(int irq, inthand2_t * func, unsigned *maskptr, int unit)
{
char buf[16];
char *cp;
int free_id, id, result;
sprintf(buf, "ipi irq%d", irq);
for (cp = intrnames, free_id = 0, id = 0; id < NR_DEVICES; id++) {
if (strcmp(cp, buf) == 0)
break;
if (free_id <= 0 && strcmp(cp, "ipi irqnn") == 0)
free_id = id;
while (*cp++ != '\0');
}
if (id == NR_DEVICES) {
id = free_id;
if (id == 0) {
/*
* All ipi irq counters are in use, perhaps because
* config is old so there aren't any. Abuse the clk0
* counter.
*/
printf(
"ipi_ihandler_attach: counting ipi irq%d's as clk0 irqs\n",
irq);
}
}
result = register_intr(
irq, /* isa irq */
id, /* device id */
0, /* flags? */
func, /* handler */
maskptr, /* mask pointer */
unit); /* handler arg */
if (result) {
printf("WARNING: ipi_ihandler_attach: result=%d\n", result);
return (result);
};
return (0);
}
#endif /* IPI_INTS */
#ifdef SMP_INVLTLB
/*
* Flush the TLB on all other CPU's
@ -1599,11 +1478,7 @@ smp_invltlb()
{
if (smp_active) {
if (invldebug & 2)
#if defined(XFAST_IPI32)
all_but_self_ipi(ICU_OFFSET + 32);
#else
all_but_self_ipi(ICU_OFFSET + 27);
#endif /* XFAST_IPI32 */
}
}

5
sys/amd64/include/apicreg.h
View File

@ -22,7 +22,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: apic.h,v 1.17 1997/04/26 06:41:36 peter Exp $
* $Id: apic.h,v 1.1 1997/04/26 11:45:32 peter Exp $
*/
#ifndef _MACHINE_APIC_H_
@ -113,9 +113,6 @@
* global defines, etc.
*/
/* enable the InterProcessor Interrupt code, FIXME: temporary marker */
#define IPI_INTS
/**
* this enables code concerned with handling more than one IO APIC.
* Note: this is NOT READY for use!

139
sys/amd64/include/mptable.h
View File

@ -22,7 +22,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: mp_machdep.c,v 1.47 1997/04/26 08:11:49 peter Exp $
* $Id: mp_machdep.c,v 1.1 1997/04/26 11:45:15 peter Exp $
*/
#include "opt_smp.h"
@ -60,11 +60,6 @@
#include <i386/i386/cons.h> /* cngetc() */
#if defined(IPI_INTS)
#include <i386/isa/isa_device.h>
#include "vector.h"
#endif /* IPI_INTS */
#if defined(SMP_INVLTLB)
#include <i386/isa/icu.h>
#endif /* SMP_INVLTLB */
@ -160,16 +155,6 @@ static int search_for_sig(u_int32_t target, int count);
static int mp_probe(u_int base_top);
static void mp_enable(u_int boot_addr);
#if defined(IPI_INTS)
static void ipi_intr0(void);
static void ipi_intr1(void);
static void ipi_intr2(void);
static void ipi_intr3(void);
static int
ipi_ihandler_attach(int irq, inthand2_t * func,
unsigned *maskptr, int unit);
#endif /* IPI_INTS */
/*
* calculate usable address in base memory for AP trampoline code
@ -325,11 +310,10 @@ static int parse_mp_table(void);
static void default_mp_table(int type);
static int start_all_aps(u_int boot_addr);
#if defined(XFAST_IPI32)
#include <machine/md_var.h>
#include <i386/isa/isa_device.h>
extern void Xfastipi32(u_int, u_int, u_int, u_int);
#endif /* XFAST_IPI32 */
#if defined(APIC_IO)
#include <i386/include/md_var.h> /* setidt() */
#include <i386/isa/isa_device.h> /* Xinvltlb() */
#endif /* APIC_IO */
static void
mp_enable(u_int boot_addr)
@ -367,31 +351,9 @@ mp_enable(u_int boot_addr)
if (io_apic_setup(apic) < 0)
panic("IO APIC setup failure\n");
#if defined(IPI_INTS)
/* setup IPI INTerrupt mechanism */
ipi_ihandler_attach( /* irq */ 24,
/* XXX */ (inthand2_t *) ipi_intr0, NULL, /* unit */ 0);
ipi_ihandler_attach( /* irq */ 25,
/* XXX */ (inthand2_t *) ipi_intr1, NULL, /* unit */ 0);
ipi_ihandler_attach( /* irq */ 26,
/* XXX */ (inthand2_t *) ipi_intr2, NULL, /* unit */ 0);
#if !defined(SMP_INVLTLB)
ipi_ihandler_attach( /* irq */ 27,
/* XXX */ (inthand2_t *) ipi_intr3, NULL, /* unit */ 0);
#else
#if defined(XFAST_IPI32)
ipi_ihandler_attach( /* irq */ 27,
/* XXX */ (inthand2_t *) ipi_intr3, NULL, /* unit */ 0);
setidt(ICU_OFFSET + 32,
Xfastipi32,
/* install an inter-CPU IPI for TLB invalidation */
setidt(ICU_OFFSET + XINVLTLB_OFFSET, Xinvltlb,
SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
#else
ipi_ihandler_attach( /* irq */ 27,
/* XXX */ (inthand2_t *) ipi_invltlb, NULL, /* unit */ 0);
#endif /* XFAST_IPI32 */
#endif
#endif /* IPI_INTS */
#if defined(TEST_UPPERPRIO)
@ -1504,89 +1466,6 @@ start_ap(int logical_cpu, u_int boot_addr)
}
#if defined(IPI_INTS)
static void
ipi_intr0(void)
{
printf("IPI 0\n");
}
static void
ipi_intr1(void)
{
printf("IPI 1\n");
}
static void
ipi_intr2(void)
{
printf("IPI 2\n");
}
static void
ipi_intr3(void)
{
printf("IPI 3\n");
}
/*-----------------------------------------------------------------------
**
** Register an interupt handler for an IPI.
** (Stolen from the PCI<->ISA glue code)
**
**-----------------------------------------------------------------------
*/
static int
ipi_ihandler_attach(int irq, inthand2_t * func, unsigned *maskptr, int unit)
{
char buf[16];
char *cp;
int free_id, id, result;
sprintf(buf, "ipi irq%d", irq);
for (cp = intrnames, free_id = 0, id = 0; id < NR_DEVICES; id++) {
if (strcmp(cp, buf) == 0)
break;
if (free_id <= 0 && strcmp(cp, "ipi irqnn") == 0)
free_id = id;
while (*cp++ != '\0');
}
if (id == NR_DEVICES) {
id = free_id;
if (id == 0) {
/*
* All ipi irq counters are in use, perhaps because
* config is old so there aren't any. Abuse the clk0
* counter.
*/
printf(
"ipi_ihandler_attach: counting ipi irq%d's as clk0 irqs\n",
irq);
}
}
result = register_intr(
irq, /* isa irq */
id, /* device id */
0, /* flags? */
func, /* handler */
maskptr, /* mask pointer */
unit); /* handler arg */
if (result) {
printf("WARNING: ipi_ihandler_attach: result=%d\n", result);
return (result);
};
return (0);
}
#endif /* IPI_INTS */
#ifdef SMP_INVLTLB
/*
* Flush the TLB on all other CPU's
@ -1599,11 +1478,7 @@ smp_invltlb()
{
if (smp_active) {
if (invldebug & 2)
#if defined(XFAST_IPI32)
all_but_self_ipi(ICU_OFFSET + 32);
#else
all_but_self_ipi(ICU_OFFSET + 27);
#endif /* XFAST_IPI32 */
}
}

139
sys/i386/i386/mp_machdep.c
View File

@ -22,7 +22,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: mp_machdep.c,v 1.47 1997/04/26 08:11:49 peter Exp $
* $Id: mp_machdep.c,v 1.1 1997/04/26 11:45:15 peter Exp $
*/
#include "opt_smp.h"
@ -60,11 +60,6 @@
#include <i386/i386/cons.h> /* cngetc() */
#if defined(IPI_INTS)
#include <i386/isa/isa_device.h>
#include "vector.h"
#endif /* IPI_INTS */
#if defined(SMP_INVLTLB)
#include <i386/isa/icu.h>
#endif /* SMP_INVLTLB */
@ -160,16 +155,6 @@ static int search_for_sig(u_int32_t target, int count);
static int mp_probe(u_int base_top);
static void mp_enable(u_int boot_addr);
#if defined(IPI_INTS)
static void ipi_intr0(void);
static void ipi_intr1(void);
static void ipi_intr2(void);
static void ipi_intr3(void);
static int
ipi_ihandler_attach(int irq, inthand2_t * func,
unsigned *maskptr, int unit);
#endif /* IPI_INTS */
/*
* calculate usable address in base memory for AP trampoline code
@ -325,11 +310,10 @@ static int parse_mp_table(void);
static void default_mp_table(int type);
static int start_all_aps(u_int boot_addr);
#if defined(XFAST_IPI32)
#include <machine/md_var.h>
#include <i386/isa/isa_device.h>
extern void Xfastipi32(u_int, u_int, u_int, u_int);
#endif /* XFAST_IPI32 */
#if defined(APIC_IO)
#include <i386/include/md_var.h> /* setidt() */
#include <i386/isa/isa_device.h> /* Xinvltlb() */
#endif /* APIC_IO */
static void
mp_enable(u_int boot_addr)
@ -367,31 +351,9 @@ mp_enable(u_int boot_addr)
if (io_apic_setup(apic) < 0)
panic("IO APIC setup failure\n");
#if defined(IPI_INTS)
/* setup IPI INTerrupt mechanism */
ipi_ihandler_attach( /* irq */ 24,
/* XXX */ (inthand2_t *) ipi_intr0, NULL, /* unit */ 0);
ipi_ihandler_attach( /* irq */ 25,
/* XXX */ (inthand2_t *) ipi_intr1, NULL, /* unit */ 0);
ipi_ihandler_attach( /* irq */ 26,
/* XXX */ (inthand2_t *) ipi_intr2, NULL, /* unit */ 0);
#if !defined(SMP_INVLTLB)
ipi_ihandler_attach( /* irq */ 27,
/* XXX */ (inthand2_t *) ipi_intr3, NULL, /* unit */ 0);
#else
#if defined(XFAST_IPI32)
ipi_ihandler_attach( /* irq */ 27,
/* XXX */ (inthand2_t *) ipi_intr3, NULL, /* unit */ 0);
setidt(ICU_OFFSET + 32,
Xfastipi32,
/* install an inter-CPU IPI for TLB invalidation */
setidt(ICU_OFFSET + XINVLTLB_OFFSET, Xinvltlb,
SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
#else
ipi_ihandler_attach( /* irq */ 27,
/* XXX */ (inthand2_t *) ipi_invltlb, NULL, /* unit */ 0);
#endif /* XFAST_IPI32 */
#endif
#endif /* IPI_INTS */
#if defined(TEST_UPPERPRIO)
@ -1504,89 +1466,6 @@ start_ap(int logical_cpu, u_int boot_addr)
}
#if defined(IPI_INTS)
static void
ipi_intr0(void)
{
printf("IPI 0\n");
}
static void
ipi_intr1(void)
{
printf("IPI 1\n");
}
static void
ipi_intr2(void)
{
printf("IPI 2\n");
}
static void
ipi_intr3(void)
{
printf("IPI 3\n");
}
/*-----------------------------------------------------------------------
**
** Register an interupt handler for an IPI.
** (Stolen from the PCI<->ISA glue code)
**
**-----------------------------------------------------------------------
*/
static int
ipi_ihandler_attach(int irq, inthand2_t * func, unsigned *maskptr, int unit)
{
char buf[16];
char *cp;
int free_id, id, result;
sprintf(buf, "ipi irq%d", irq);
for (cp = intrnames, free_id = 0, id = 0; id < NR_DEVICES; id++) {
if (strcmp(cp, buf) == 0)
break;
if (free_id <= 0 && strcmp(cp, "ipi irqnn") == 0)
free_id = id;
while (*cp++ != '\0');
}
if (id == NR_DEVICES) {
id = free_id;
if (id == 0) {
/*
* All ipi irq counters are in use, perhaps because
* config is old so there aren't any. Abuse the clk0
* counter.
*/
printf(
"ipi_ihandler_attach: counting ipi irq%d's as clk0 irqs\n",
irq);
}
}
result = register_intr(
irq, /* isa irq */
id, /* device id */
0, /* flags? */
func, /* handler */
maskptr, /* mask pointer */
unit); /* handler arg */
if (result) {
printf("WARNING: ipi_ihandler_attach: result=%d\n", result);
return (result);
};
return (0);
}
#endif /* IPI_INTS */
#ifdef SMP_INVLTLB
/*
* Flush the TLB on all other CPU's
@ -1599,11 +1478,7 @@ smp_invltlb()
{
if (smp_active) {
if (invldebug & 2)
#if defined(XFAST_IPI32)
all_but_self_ipi(ICU_OFFSET + 32);
#else
all_but_self_ipi(ICU_OFFSET + 27);
#endif /* XFAST_IPI32 */
}
}

64
sys/i386/i386/mpapic.c
View File

@ -22,7 +22,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: mpapic.c,v 1.32 1997/04/26 05:58:01 peter Exp $
* $Id: mpapic.c,v 1.1 1997/04/26 11:45:15 peter Exp $
*/
#include <sys/types.h>
@ -30,7 +30,6 @@
#include <sys/systm.h>
#include <machine/smp.h>
#include <machine/apic.h> /** IPI_INTS */
#include <machine/mpapic.h>
#include <machine/smptests.h> /** TEST_LOPRIO, TEST_IPI */
#include <machine/cpufunc.h>
@ -769,64 +768,3 @@ u_sleep(int count)
while (read_apic_timer())
/* spin */ ;
}
#if defined(TEST_IPI) && defined(IPI_INTS)
#define TEST_IRQBA (ICU_OFFSET+24) /* BSP & AP */
#define TEST_IRQB (ICU_OFFSET+25) /* BSP */
#define TEST_IRQA (ICU_OFFSET+26) /* AP */
/**
* a series of tests for the apic IPI routines
* I call them from db (you only get one shot @ the AP, no way to EOI it!)
*/
#include <sys/param.h>
#include <i386/isa/isa_device.h>
#include <i386/isa/icu.h>
void apt1(void);
void apt2(void);
void apt3(void);
void apt4(void);
void apt5(void);
void apt6(void);
void apeoi(void);
void
apt1(void)
{
selected_procs_ipi(0x0001, TEST_IRQB); /* INT BSP */
}
void
apt2(void)
{
selected_procs_ipi(0x0002, TEST_IRQA); /* INT AP */
}
void
apt3(void)
{
selected_procs_ipi(0x0003, TEST_IRQBA); /* INT BSP/AP */
}
void
apt4(void)
{
all_procs_ipi(TEST_IRQBA); /* INT BSP/AP */
}
void
apt5(void)
{
all_but_self_ipi(TEST_IRQA); /* INT AP */
}
void
apt6(void)
{
self_ipi(TEST_IRQB); /* INT BSP */
}
void
apeoi(void)
{
apic_base[APIC_EOI] = 0;
}
#endif /* TEST_IPI && IPI_INTS */

139
sys/i386/i386/mptable.c
View File

@ -22,7 +22,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: mp_machdep.c,v 1.47 1997/04/26 08:11:49 peter Exp $
* $Id: mp_machdep.c,v 1.1 1997/04/26 11:45:15 peter Exp $
*/
#include "opt_smp.h"
@ -60,11 +60,6 @@
#include <i386/i386/cons.h> /* cngetc() */
#if defined(IPI_INTS)
#include <i386/isa/isa_device.h>
#include "vector.h"
#endif /* IPI_INTS */
#if defined(SMP_INVLTLB)
#include <i386/isa/icu.h>
#endif /* SMP_INVLTLB */
@ -160,16 +155,6 @@ static int search_for_sig(u_int32_t target, int count);
static int mp_probe(u_int base_top);
static void mp_enable(u_int boot_addr);
#if defined(IPI_INTS)
static void ipi_intr0(void);
static void ipi_intr1(void);
static void ipi_intr2(void);
static void ipi_intr3(void);
static int
ipi_ihandler_attach(int irq, inthand2_t * func,
unsigned *maskptr, int unit);
#endif /* IPI_INTS */
/*
* calculate usable address in base memory for AP trampoline code
@ -325,11 +310,10 @@ static int parse_mp_table(void);
static void default_mp_table(int type);
static int start_all_aps(u_int boot_addr);
#if defined(XFAST_IPI32)
#include <machine/md_var.h>
#include <i386/isa/isa_device.h>
extern void Xfastipi32(u_int, u_int, u_int, u_int);
#endif /* XFAST_IPI32 */
#if defined(APIC_IO)
#include <i386/include/md_var.h> /* setidt() */
#include <i386/isa/isa_device.h> /* Xinvltlb() */
#endif /* APIC_IO */
static void
mp_enable(u_int boot_addr)
@ -367,31 +351,9 @@ mp_enable(u_int boot_addr)
if (io_apic_setup(apic) < 0)
panic("IO APIC setup failure\n");
#if defined(IPI_INTS)
/* setup IPI INTerrupt mechanism */
ipi_ihandler_attach( /* irq */ 24,
/* XXX */ (inthand2_t *) ipi_intr0, NULL, /* unit */ 0);
ipi_ihandler_attach( /* irq */ 25,
/* XXX */ (inthand2_t *) ipi_intr1, NULL, /* unit */ 0);
ipi_ihandler_attach( /* irq */ 26,
/* XXX */ (inthand2_t *) ipi_intr2, NULL, /* unit */ 0);
#if !defined(SMP_INVLTLB)
ipi_ihandler_attach( /* irq */ 27,
/* XXX */ (inthand2_t *) ipi_intr3, NULL, /* unit */ 0);
#else
#if defined(XFAST_IPI32)
ipi_ihandler_attach( /* irq */ 27,
/* XXX */ (inthand2_t *) ipi_intr3, NULL, /* unit */ 0);
setidt(ICU_OFFSET + 32,
Xfastipi32,
/* install an inter-CPU IPI for TLB invalidation */
setidt(ICU_OFFSET + XINVLTLB_OFFSET, Xinvltlb,
SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
#else
ipi_ihandler_attach( /* irq */ 27,
/* XXX */ (inthand2_t *) ipi_invltlb, NULL, /* unit */ 0);
#endif /* XFAST_IPI32 */
#endif
#endif /* IPI_INTS */
#if defined(TEST_UPPERPRIO)
@ -1504,89 +1466,6 @@ start_ap(int logical_cpu, u_int boot_addr)
}
#if defined(IPI_INTS)
static void
ipi_intr0(void)
{
printf("IPI 0\n");
}
static void
ipi_intr1(void)
{
printf("IPI 1\n");
}
static void
ipi_intr2(void)
{
printf("IPI 2\n");
}
static void
ipi_intr3(void)
{
printf("IPI 3\n");
}
/*-----------------------------------------------------------------------
**
** Register an interupt handler for an IPI.
** (Stolen from the PCI<->ISA glue code)
**
**-----------------------------------------------------------------------
*/
static int
ipi_ihandler_attach(int irq, inthand2_t * func, unsigned *maskptr, int unit)
{
char buf[16];
char *cp;
int free_id, id, result;
sprintf(buf, "ipi irq%d", irq);
for (cp = intrnames, free_id = 0, id = 0; id < NR_DEVICES; id++) {
if (strcmp(cp, buf) == 0)
break;
if (free_id <= 0 && strcmp(cp, "ipi irqnn") == 0)
free_id = id;
while (*cp++ != '\0');
}
if (id == NR_DEVICES) {
id = free_id;
if (id == 0) {
/*
* All ipi irq counters are in use, perhaps because
* config is old so there aren't any. Abuse the clk0
* counter.
*/
printf(
"ipi_ihandler_attach: counting ipi irq%d's as clk0 irqs\n",
irq);
}
}
result = register_intr(
irq, /* isa irq */
id, /* device id */
0, /* flags? */
func, /* handler */
maskptr, /* mask pointer */
unit); /* handler arg */
if (result) {
printf("WARNING: ipi_ihandler_attach: result=%d\n", result);
return (result);
};
return (0);
}
#endif /* IPI_INTS */
#ifdef SMP_INVLTLB
/*
* Flush the TLB on all other CPU's
@ -1599,11 +1478,7 @@ smp_invltlb()
{
if (smp_active) {
if (invldebug & 2)
#if defined(XFAST_IPI32)
all_but_self_ipi(ICU_OFFSET + 32);
#else
all_but_self_ipi(ICU_OFFSET + 27);
#endif /* XFAST_IPI32 */
}
}

5
sys/i386/include/apic.h
View File

@ -22,7 +22,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: apic.h,v 1.17 1997/04/26 06:41:36 peter Exp $
* $Id: apic.h,v 1.1 1997/04/26 11:45:32 peter Exp $
*/
#ifndef _MACHINE_APIC_H_
@ -113,9 +113,6 @@
* global defines, etc.
*/
/* enable the InterProcessor Interrupt code, FIXME: temporary marker */
#define IPI_INTS
/**
* this enables code concerned with handling more than one IO APIC.
* Note: this is NOT READY for use!

5
sys/i386/include/apicreg.h
View File

@ -22,7 +22,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: apic.h,v 1.17 1997/04/26 06:41:36 peter Exp $
* $Id: apic.h,v 1.1 1997/04/26 11:45:32 peter Exp $
*/
#ifndef _MACHINE_APIC_H_
@ -113,9 +113,6 @@
* global defines, etc.
*/
/* enable the InterProcessor Interrupt code, FIXME: temporary marker */
#define IPI_INTS
/**
* this enables code concerned with handling more than one IO APIC.
* Note: this is NOT READY for use!

8
sys/i386/include/ipl.h
View File

@ -30,7 +30,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: ipl.h,v 1.5 1997/04/26 11:45:37 peter Exp $
* $Id: ipl.h,v 1.6 1997/04/26 20:04:21 peter Exp $
*/
#ifndef _ISA_IPL_H_
@ -42,14 +42,8 @@
#if defined(APIC_IO)
#include <machine/apic.h>
#if defined(IPI_INTS)
#define NHWI 28 /* number of h/w interrupts */
#define HWI_MASK 0x0fffffff /* bits for h/w interrupts */
#else
#define NHWI 24 /* number of h/w interrupts */
#define HWI_MASK 0x00ffffff /* bits for h/w interrupts */
#endif /* IPI_INTS */
#else

3
sys/i386/include/mpapic.h
View File

@ -22,13 +22,14 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: mpapic.h,v 1.14 1997/04/26 08:11:50 peter Exp $
* $Id: mpapic.h,v 1.1 1997/04/26 11:45:38 peter Exp $
*/
#ifndef _MACHINE_MPAPIC_H_
#define _MACHINE_MPAPIC_H_
#include <i386/isa/icu.h>
#include <i386/include/apic.h>
/* number of busses */
#if !defined(NBUS)

139
sys/i386/include/mptable.h
View File

@ -22,7 +22,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: mp_machdep.c,v 1.47 1997/04/26 08:11:49 peter Exp $
* $Id: mp_machdep.c,v 1.1 1997/04/26 11:45:15 peter Exp $
*/
#include "opt_smp.h"
@ -60,11 +60,6 @@
#include <i386/i386/cons.h> /* cngetc() */
#if defined(IPI_INTS)
#include <i386/isa/isa_device.h>
#include "vector.h"
#endif /* IPI_INTS */
#if defined(SMP_INVLTLB)
#include <i386/isa/icu.h>
#endif /* SMP_INVLTLB */
@ -160,16 +155,6 @@ static int search_for_sig(u_int32_t target, int count);
static int mp_probe(u_int base_top);
static void mp_enable(u_int boot_addr);
#if defined(IPI_INTS)
static void ipi_intr0(void);
static void ipi_intr1(void);
static void ipi_intr2(void);
static void ipi_intr3(void);
static int
ipi_ihandler_attach(int irq, inthand2_t * func,
unsigned *maskptr, int unit);
#endif /* IPI_INTS */
/*
* calculate usable address in base memory for AP trampoline code
@ -325,11 +310,10 @@ static int parse_mp_table(void);
static void default_mp_table(int type);
static int start_all_aps(u_int boot_addr);
#if defined(XFAST_IPI32)
#include <machine/md_var.h>
#include <i386/isa/isa_device.h>
extern void Xfastipi32(u_int, u_int, u_int, u_int);
#endif /* XFAST_IPI32 */
#if defined(APIC_IO)
#include <i386/include/md_var.h> /* setidt() */
#include <i386/isa/isa_device.h> /* Xinvltlb() */
#endif /* APIC_IO */
static void
mp_enable(u_int boot_addr)
@ -367,31 +351,9 @@ mp_enable(u_int boot_addr)
if (io_apic_setup(apic) < 0)
panic("IO APIC setup failure\n");
#if defined(IPI_INTS)
/* setup IPI INTerrupt mechanism */
ipi_ihandler_attach( /* irq */ 24,
/* XXX */ (inthand2_t *) ipi_intr0, NULL, /* unit */ 0);
ipi_ihandler_attach( /* irq */ 25,
/* XXX */ (inthand2_t *) ipi_intr1, NULL, /* unit */ 0);
ipi_ihandler_attach( /* irq */ 26,
/* XXX */ (inthand2_t *) ipi_intr2, NULL, /* unit */ 0);
#if !defined(SMP_INVLTLB)
ipi_ihandler_attach( /* irq */ 27,
/* XXX */ (inthand2_t *) ipi_intr3, NULL, /* unit */ 0);
#else
#if defined(XFAST_IPI32)
ipi_ihandler_attach( /* irq */ 27,
/* XXX */ (inthand2_t *) ipi_intr3, NULL, /* unit */ 0);
setidt(ICU_OFFSET + 32,
Xfastipi32,
/* install an inter-CPU IPI for TLB invalidation */
setidt(ICU_OFFSET + XINVLTLB_OFFSET, Xinvltlb,
SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
#else
ipi_ihandler_attach( /* irq */ 27,
/* XXX */ (inthand2_t *) ipi_invltlb, NULL, /* unit */ 0);
#endif /* XFAST_IPI32 */
#endif
#endif /* IPI_INTS */
#if defined(TEST_UPPERPRIO)
@ -1504,89 +1466,6 @@ start_ap(int logical_cpu, u_int boot_addr)
}
#if defined(IPI_INTS)
static void
ipi_intr0(void)
{
printf("IPI 0\n");
}
static void
ipi_intr1(void)
{
printf("IPI 1\n");
}
static void
ipi_intr2(void)
{
printf("IPI 2\n");
}
static void
ipi_intr3(void)
{
printf("IPI 3\n");
}
/*-----------------------------------------------------------------------
**
** Register an interupt handler for an IPI.
** (Stolen from the PCI<->ISA glue code)
**
**-----------------------------------------------------------------------
*/
static int
ipi_ihandler_attach(int irq, inthand2_t * func, unsigned *maskptr, int unit)
{
char buf[16];
char *cp;
int free_id, id, result;
sprintf(buf, "ipi irq%d", irq);
for (cp = intrnames, free_id = 0, id = 0; id < NR_DEVICES; id++) {
if (strcmp(cp, buf) == 0)
break;
if (free_id <= 0 && strcmp(cp, "ipi irqnn") == 0)
free_id = id;
while (*cp++ != '\0');
}
if (id == NR_DEVICES) {
id = free_id;
if (id == 0) {
/*
* All ipi irq counters are in use, perhaps because
* config is old so there aren't any. Abuse the clk0
* counter.
*/
printf(
"ipi_ihandler_attach: counting ipi irq%d's as clk0 irqs\n",
irq);
}
}
result = register_intr(
irq, /* isa irq */
id, /* device id */
0, /* flags? */
func, /* handler */
maskptr, /* mask pointer */
unit); /* handler arg */
if (result) {
printf("WARNING: ipi_ihandler_attach: result=%d\n", result);
return (result);
};
return (0);
}
#endif /* IPI_INTS */
#ifdef SMP_INVLTLB
/*
* Flush the TLB on all other CPU's
@ -1599,11 +1478,7 @@ smp_invltlb()
{
if (smp_active) {
if (invldebug & 2)
#if defined(XFAST_IPI32)
all_but_self_ipi(ICU_OFFSET + 32);
#else
all_but_self_ipi(ICU_OFFSET + 27);
#endif /* XFAST_IPI32 */
}
}

16
sys/i386/include/smptests.h
View File

@ -22,7 +22,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: smptests.h,v 1.13 1997/04/26 07:24:21 fsmp Exp $
* $Id: smptests.h,v 1.1 1997/04/26 11:45:47 peter Exp $
*/
#ifndef _MACHINE_SMPTESTS_H_
@ -34,12 +34,6 @@
*/
/*
* faster invltlb IPI, asm only
*/
#define XFAST_IPI32
/*
* use 'lowest priority' for sending IRQs to CPUs
*
@ -49,14 +43,6 @@
#define TEST_LOPRIO
/*
* test the InterProcessor Interrupt mechanism.
*
* i386/i386/mpapic.c
*/
#define TEST_IPI
/*
* count INT hits by CPU
*

139
sys/kern/subr_smp.c
View File

@ -22,7 +22,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: mp_machdep.c,v 1.47 1997/04/26 08:11:49 peter Exp $
* $Id: mp_machdep.c,v 1.1 1997/04/26 11:45:15 peter Exp $
*/
#include "opt_smp.h"
@ -60,11 +60,6 @@
#include <i386/i386/cons.h> /* cngetc() */
#if defined(IPI_INTS)
#include <i386/isa/isa_device.h>
#include "vector.h"
#endif /* IPI_INTS */
#if defined(SMP_INVLTLB)
#include <i386/isa/icu.h>
#endif /* SMP_INVLTLB */
@ -160,16 +155,6 @@ static int search_for_sig(u_int32_t target, int count);
static int mp_probe(u_int base_top);
static void mp_enable(u_int boot_addr);
#if defined(IPI_INTS)
static void ipi_intr0(void);
static void ipi_intr1(void);
static void ipi_intr2(void);
static void ipi_intr3(void);
static int
ipi_ihandler_attach(int irq, inthand2_t * func,
unsigned *maskptr, int unit);
#endif /* IPI_INTS */
/*
* calculate usable address in base memory for AP trampoline code
@ -325,11 +310,10 @@ static int parse_mp_table(void);
static void default_mp_table(int type);
static int start_all_aps(u_int boot_addr);
#if defined(XFAST_IPI32)
#include <machine/md_var.h>
#include <i386/isa/isa_device.h>
extern void Xfastipi32(u_int, u_int, u_int, u_int);
#endif /* XFAST_IPI32 */
#if defined(APIC_IO)
#include <i386/include/md_var.h> /* setidt() */
#include <i386/isa/isa_device.h> /* Xinvltlb() */
#endif /* APIC_IO */
static void
mp_enable(u_int boot_addr)
@ -367,31 +351,9 @@ mp_enable(u_int boot_addr)
if (io_apic_setup(apic) < 0)
panic("IO APIC setup failure\n");
#if defined(IPI_INTS)
/* setup IPI INTerrupt mechanism */
ipi_ihandler_attach( /* irq */ 24,
/* XXX */ (inthand2_t *) ipi_intr0, NULL, /* unit */ 0);
ipi_ihandler_attach( /* irq */ 25,
/* XXX */ (inthand2_t *) ipi_intr1, NULL, /* unit */ 0);
ipi_ihandler_attach( /* irq */ 26,
/* XXX */ (inthand2_t *) ipi_intr2, NULL, /* unit */ 0);
#if !defined(SMP_INVLTLB)
ipi_ihandler_attach( /* irq */ 27,
/* XXX */ (inthand2_t *) ipi_intr3, NULL, /* unit */ 0);
#else
#if defined(XFAST_IPI32)
ipi_ihandler_attach( /* irq */ 27,
/* XXX */ (inthand2_t *) ipi_intr3, NULL, /* unit */ 0);
setidt(ICU_OFFSET + 32,
Xfastipi32,
/* install an inter-CPU IPI for TLB invalidation */
setidt(ICU_OFFSET + XINVLTLB_OFFSET, Xinvltlb,
SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
#else
ipi_ihandler_attach( /* irq */ 27,
/* XXX */ (inthand2_t *) ipi_invltlb, NULL, /* unit */ 0);
#endif /* XFAST_IPI32 */
#endif
#endif /* IPI_INTS */
#if defined(TEST_UPPERPRIO)
@ -1504,89 +1466,6 @@ start_ap(int logical_cpu, u_int boot_addr)
}
#if defined(IPI_INTS)
static void
ipi_intr0(void)
{
printf("IPI 0\n");
}
static void
ipi_intr1(void)
{
printf("IPI 1\n");
}
static void
ipi_intr2(void)
{
printf("IPI 2\n");
}
static void
ipi_intr3(void)
{
printf("IPI 3\n");
}
/*-----------------------------------------------------------------------
**
** Register an interupt handler for an IPI.
** (Stolen from the PCI<->ISA glue code)
**
**-----------------------------------------------------------------------
*/
static int
ipi_ihandler_attach(int irq, inthand2_t * func, unsigned *maskptr, int unit)
{
char buf[16];
char *cp;
int free_id, id, result;
sprintf(buf, "ipi irq%d", irq);
for (cp = intrnames, free_id = 0, id = 0; id < NR_DEVICES; id++) {
if (strcmp(cp, buf) == 0)
break;
if (free_id <= 0 && strcmp(cp, "ipi irqnn") == 0)
free_id = id;
while (*cp++ != '\0');
}
if (id == NR_DEVICES) {
id = free_id;
if (id == 0) {
/*
* All ipi irq counters are in use, perhaps because
* config is old so there aren't any. Abuse the clk0
* counter.
*/
printf(
"ipi_ihandler_attach: counting ipi irq%d's as clk0 irqs\n",
irq);
}
}
result = register_intr(
irq, /* isa irq */
id, /* device id */
0, /* flags? */
func, /* handler */
maskptr, /* mask pointer */
unit); /* handler arg */
if (result) {
printf("WARNING: ipi_ihandler_attach: result=%d\n", result);
return (result);
};
return (0);
}
#endif /* IPI_INTS */
#ifdef SMP_INVLTLB
/*
* Flush the TLB on all other CPU's
@ -1599,11 +1478,7 @@ smp_invltlb()
{
if (smp_active) {
if (invldebug & 2)
#if defined(XFAST_IPI32)
all_but_self_ipi(ICU_OFFSET + 32);
#else
all_but_self_ipi(ICU_OFFSET + 27);
#endif /* XFAST_IPI32 */
}
}