Bump APIC ID limits up to 32 since a machine with 16 CPUs will have APIC
IDs for the I/O APICs that are greater than 16. Reported by: John Cagle <john.cagle@hp.com>
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@ -53,8 +53,8 @@ __FBSDID("$FreeBSD$");
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#include <dev/acpica/madt.h>
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#include <dev/pci/pcivar.h>
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#define NIOAPICS 16 /* Max number of I/O APICs */
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#define NLAPICS 16 /* Max number of local APICs */
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#define NIOAPICS 32 /* Max number of I/O APICs */
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#define NLAPICS 32 /* Max number of local APICs */
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typedef void madt_entry_handler(APIC_HEADER *entry, void *arg);
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@ -54,7 +54,7 @@ __FBSDID("$FreeBSD$");
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/* string defined by the Intel MP Spec as identifying the MP table */
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#define MP_SIG 0x5f504d5f /* _MP_ */
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#define NAPICID 16 /* Max number of I/O APIC's */
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#define NAPICID 32 /* Max number of I/O APIC's */
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#ifdef PC98
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#define BIOS_BASE (0xe8000)
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@ -53,8 +53,8 @@ __FBSDID("$FreeBSD$");
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#include <dev/acpica/madt.h>
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#include <dev/pci/pcivar.h>
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#define NIOAPICS 16 /* Max number of I/O APICs */
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#define NLAPICS 16 /* Max number of local APICs */
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#define NIOAPICS 32 /* Max number of I/O APICs */
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#define NLAPICS 32 /* Max number of local APICs */
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typedef void madt_entry_handler(APIC_HEADER *entry, void *arg);
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@ -54,7 +54,7 @@ __FBSDID("$FreeBSD$");
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/* string defined by the Intel MP Spec as identifying the MP table */
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#define MP_SIG 0x5f504d5f /* _MP_ */
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#define NAPICID 16 /* Max number of I/O APIC's */
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#define NAPICID 32 /* Max number of I/O APIC's */
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#ifdef PC98
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#define BIOS_BASE (0xe8000)
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