Block event interrupts when we don't need it as soon as possible.
Typically this feature is used for isochronous transfers. This reduces the amount of XHCI interrupting. MFC after: 1 week
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960738a3a8
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@ -1545,6 +1545,7 @@ xhci_setup_generic_chain_sub(struct xhci_std_temp *temp)
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{
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struct usb_page_search buf_res;
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struct xhci_td *td;
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struct xhci_td *td_first;
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struct xhci_td *td_next;
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struct xhci_td *td_alt_next;
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uint32_t buf_offset;
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@ -1564,7 +1565,7 @@ xhci_setup_generic_chain_sub(struct xhci_std_temp *temp)
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restart:
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td = temp->td;
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td_next = temp->td_next;
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td_next = td_first = temp->td_next;
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while (1) {
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@ -1698,7 +1699,9 @@ xhci_setup_generic_chain_sub(struct xhci_std_temp *temp)
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td->td_trb[x].dwTrb2 = htole32(dword);
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/* BEI: Interrupts are inhibited until EOT */
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dword = XHCI_TRB_3_CHAIN_BIT | XHCI_TRB_3_CYCLE_BIT |
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XHCI_TRB_3_BEI_BIT |
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XHCI_TRB_3_TYPE_SET(temp->trb_type) |
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XHCI_TRB_3_TBC_SET(temp->tbc) |
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XHCI_TRB_3_TLBPC_SET(temp->tlbpc);
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@ -1761,8 +1764,10 @@ xhci_setup_generic_chain_sub(struct xhci_std_temp *temp)
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td->td_trb[x].dwTrb2 = htole32(dword);
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/* BEI: interrupts are inhibited until EOT */
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dword = XHCI_TRB_3_TYPE_SET(XHCI_TRB_TYPE_LINK) |
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XHCI_TRB_3_CYCLE_BIT | XHCI_TRB_3_IOC_BIT;
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XHCI_TRB_3_CYCLE_BIT | XHCI_TRB_3_IOC_BIT |
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XHCI_TRB_3_BEI_BIT;
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td->td_trb[x].dwTrb3 = htole32(dword);
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@ -1790,9 +1795,14 @@ xhci_setup_generic_chain_sub(struct xhci_std_temp *temp)
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goto restart;
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}
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/* remove cycle bit from first if we are stepping the TRBs */
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if (temp->step_td)
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td->td_trb[0].dwTrb3 &= ~htole32(XHCI_TRB_3_CYCLE_BIT);
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/* need to force an interrupt if we are stepping the TRBs */
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if ((temp->direction & UE_DIR_IN) != 0 && temp->multishort == 0) {
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/* remove cycle bit from first TRB if we are stepping them */
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if (temp->step_td)
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td_first->td_trb[0].dwTrb3 &= ~htole32(XHCI_TRB_3_CYCLE_BIT);
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/* make sure the last LINK event generates an interrupt */
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td->td_trb[td->ntrb].dwTrb3 &= ~htole32(XHCI_TRB_3_BEI_BIT);
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}
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/* remove chain bit because this is the last TRB in the chain */
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td->td_trb[td->ntrb - 1].dwTrb2 &= ~htole32(XHCI_TRB_2_TDSZ_SET(15));
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@ -2655,6 +2665,7 @@ xhci_transfer_insert(struct usb_xfer *xfer)
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{
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struct xhci_td *td_first;
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struct xhci_td *td_last;
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struct xhci_trb *trb_link;
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struct xhci_endpoint_ext *pepext;
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uint64_t addr;
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usb_stream_t id;
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@ -2730,11 +2741,15 @@ xhci_transfer_insert(struct usb_xfer *xfer)
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/* compute terminating return address */
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addr += (inext * sizeof(struct xhci_trb));
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/* compute link TRB pointer */
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trb_link = td_last->td_trb + td_last->ntrb;
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/* update next pointer of last link TRB */
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td_last->td_trb[td_last->ntrb].qwTrb0 = htole64(addr);
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td_last->td_trb[td_last->ntrb].dwTrb2 = htole32(XHCI_TRB_2_IRQ_SET(0));
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td_last->td_trb[td_last->ntrb].dwTrb3 = htole32(XHCI_TRB_3_IOC_BIT |
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XHCI_TRB_3_CYCLE_BIT | XHCI_TRB_3_TYPE_SET(XHCI_TRB_TYPE_LINK));
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trb_link->qwTrb0 = htole64(addr);
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trb_link->dwTrb2 = htole32(XHCI_TRB_2_IRQ_SET(0));
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trb_link->dwTrb3 = htole32(XHCI_TRB_3_IOC_BIT |
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XHCI_TRB_3_CYCLE_BIT |
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XHCI_TRB_3_TYPE_SET(XHCI_TRB_TYPE_LINK));
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#ifdef USB_DEBUG
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xhci_dump_trb(&td_last->td_trb[td_last->ntrb]);
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