Add basic support for isochronous transfers in host mode to the
ISP/SAF1761 driver. Sponsored by: DARPA, AFRL
This commit is contained in:
hselasky
parent
26c0c3b8dc
commit
29d155d293
@ -112,6 +112,7 @@ SYSCTL_INT(_hw_usb_saf1761_otg, OID_AUTO, forcefs, CTLFLAG_RW,
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static const struct usb_bus_methods saf1761_otg_bus_methods;
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static const struct usb_pipe_methods saf1761_otg_non_isoc_methods;
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static const struct usb_pipe_methods saf1761_otg_device_isoc_methods;
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static const struct usb_pipe_methods saf1761_otg_host_isoc_methods;
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static saf1761_otg_cmd_t saf1761_host_setup_tx;
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static saf1761_otg_cmd_t saf1761_host_bulk_data_rx;
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@ -758,7 +759,8 @@ saf1761_host_intr_data_rx(struct saf1761_otg_softc *sc, struct saf1761_otg_td *t
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temp = SOTG_PTD_DW3_ACTIVE | (td->toggle << 25) | SOTG_PTD_DW3_CERR_3;
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SAF1761_WRITE_LE_4(sc, pdt_addr + SOTG_PTD_DW3, temp);
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temp = (SOTG_HC_MEMORY_ADDR(SOTG_DATA_ADDR(td->channel)) << 8) | (td->interval & 0xF8);
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temp = (SOTG_HC_MEMORY_ADDR(SOTG_DATA_ADDR(td->channel)) << 8) |
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(td->interval & 0xF8);
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SAF1761_WRITE_LE_4(sc, pdt_addr + SOTG_PTD_DW2, temp);
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temp = td->dw1_value | (1 << 10) /* IN-PID */ | (td->ep_index >> 1);
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@ -847,7 +849,8 @@ saf1761_host_intr_data_tx(struct saf1761_otg_softc *sc, struct saf1761_otg_td *t
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temp = SOTG_PTD_DW3_ACTIVE | (td->toggle << 25) | SOTG_PTD_DW3_CERR_3;
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SAF1761_WRITE_LE_4(sc, pdt_addr + SOTG_PTD_DW3, temp);
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temp = (SOTG_HC_MEMORY_ADDR(SOTG_DATA_ADDR(td->channel)) << 8) | (td->interval & 0xF8);
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temp = (SOTG_HC_MEMORY_ADDR(SOTG_DATA_ADDR(td->channel)) << 8) |
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(td->interval & 0xF8);
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SAF1761_WRITE_LE_4(sc, pdt_addr + SOTG_PTD_DW2, temp);
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temp = td->dw1_value | (0 << 10) /* OUT-PID */ | (td->ep_index >> 1);
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@ -874,21 +877,160 @@ complete:
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static uint8_t
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saf1761_host_isoc_data_rx(struct saf1761_otg_softc *sc, struct saf1761_otg_td *td)
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{
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uint32_t pdt_addr;
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uint32_t temp;
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if (td->channel < SOTG_HOST_CHANNEL_MAX) {
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uint32_t status;
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uint32_t count;
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pdt_addr = SOTG_PTD(td->channel);
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status = saf1761_peek_host_status_le_4(sc, pdt_addr + SOTG_PTD_DW3);
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DPRINTFN(5, "STATUS=0x%08x\n", status);
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if (status & SOTG_PTD_DW3_ACTIVE) {
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goto busy;
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} else if (status & SOTG_PTD_DW3_HALTED) {
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goto complete;
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}
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count = (status & SOTG_PTD_DW3_XFER_COUNT);
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/* verify the packet byte count */
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if (count != td->max_packet_size) {
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if (count < td->max_packet_size) {
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/* we have a short packet */
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td->short_pkt = 1;
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} else {
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/* invalid USB packet */
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td->error_any = 1;
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goto complete;
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}
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}
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/* verify the packet byte count */
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if (count > td->remainder) {
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/* invalid USB packet */
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td->error_any = 1;
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goto complete;
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}
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saf1761_read_host_memory(sc, td, count);
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goto complete;
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}
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if (saf1761_host_channel_alloc(sc, td))
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goto busy;
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/* receive one more packet */
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pdt_addr = SOTG_PTD(td->channel);
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SAF1761_WRITE_LE_4(sc, pdt_addr + SOTG_PTD_DW7, 0);
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SAF1761_WRITE_LE_4(sc, pdt_addr + SOTG_PTD_DW6, 0);
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temp = (0xFC << td->uframe) & 0xFF; /* complete split */
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SAF1761_WRITE_LE_4(sc, pdt_addr + SOTG_PTD_DW5, temp);
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temp = (1U << td->uframe); /* start split */
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SAF1761_WRITE_LE_4(sc, pdt_addr + SOTG_PTD_DW4, temp);
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temp = SOTG_PTD_DW3_ACTIVE | SOTG_PTD_DW3_CERR_3;
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SAF1761_WRITE_LE_4(sc, pdt_addr + SOTG_PTD_DW3, temp);
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temp = (SOTG_HC_MEMORY_ADDR(SOTG_DATA_ADDR(td->channel)) << 8);
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SAF1761_WRITE_LE_4(sc, pdt_addr + SOTG_PTD_DW2, temp);
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temp = td->dw1_value | (1 << 10) /* IN-PID */ | (td->ep_index >> 1);
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SAF1761_WRITE_LE_4(sc, pdt_addr + SOTG_PTD_DW1, temp);
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temp = (td->ep_index << 31) | (1 << 29) /* pkt-multiplier */ |
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(td->max_packet_size << 18) /* wMaxPacketSize */ |
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(td->max_packet_size << 3) /* transfer count */ |
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SOTG_PTD_DW0_VALID;
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SAF1761_WRITE_LE_4(sc, pdt_addr + SOTG_PTD_DW0, temp);
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/* activate PTD */
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SAF1761_WRITE_LE_4(sc, SOTG_ISO_PTD_SKIP_PTD,
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(~sc->sc_host_isoc_map) | sc->sc_host_isoc_suspend_map);
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busy:
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return (1); /* busy */
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complete:
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saf1761_host_channel_free(sc, td);
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return (0); /* complete */
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}
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static uint8_t
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saf1761_host_isoc_data_tx(struct saf1761_otg_softc *sc, struct saf1761_otg_td *td)
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{
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uint32_t pdt_addr;
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uint32_t temp;
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uint32_t count;
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if (td->channel < SOTG_HOST_CHANNEL_MAX) {
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uint32_t status;
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pdt_addr = SOTG_PTD(td->channel);
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status = saf1761_peek_host_status_le_4(sc, pdt_addr + SOTG_PTD_DW3);
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DPRINTFN(5, "STATUS=0x%08x\n", status);
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if (status & SOTG_PTD_DW3_ACTIVE) {
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goto busy;
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} else if (status & SOTG_PTD_DW3_HALTED) {
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goto complete;
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}
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goto complete;
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}
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if (saf1761_host_channel_alloc(sc, td))
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goto busy;
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count = td->max_packet_size;
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if (td->remainder < count) {
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/* we have a short packet */
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td->short_pkt = 1;
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count = td->remainder;
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}
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saf1761_write_host_memory(sc, td, count);
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/* send one more packet */
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pdt_addr = SOTG_PTD(td->channel);
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SAF1761_WRITE_LE_4(sc, pdt_addr + SOTG_PTD_DW7, 0);
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SAF1761_WRITE_LE_4(sc, pdt_addr + SOTG_PTD_DW6, 0);
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SAF1761_WRITE_LE_4(sc, pdt_addr + SOTG_PTD_DW5, 0);
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temp = (1U << td->uframe); /* start split */
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SAF1761_WRITE_LE_4(sc, pdt_addr + SOTG_PTD_DW4, temp);
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temp = SOTG_PTD_DW3_ACTIVE | SOTG_PTD_DW3_CERR_3;
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SAF1761_WRITE_LE_4(sc, pdt_addr + SOTG_PTD_DW3, temp);
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temp = (SOTG_HC_MEMORY_ADDR(SOTG_DATA_ADDR(td->channel)) << 8);
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SAF1761_WRITE_LE_4(sc, pdt_addr + SOTG_PTD_DW2, temp);
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temp = td->dw1_value | (0 << 10) /* OUT-PID */ | (td->ep_index >> 1);
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SAF1761_WRITE_LE_4(sc, pdt_addr + SOTG_PTD_DW1, temp);
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temp = (td->ep_index << 31) | (1 << 29) /* pkt-multiplier */ |
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(count << 18) /* wMaxPacketSize */ |
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(count << 3) /* transfer count */ |
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SOTG_PTD_DW0_VALID;
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SAF1761_WRITE_LE_4(sc, pdt_addr + SOTG_PTD_DW0, temp);
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/* activate PTD */
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SAF1761_WRITE_LE_4(sc, SOTG_ISO_PTD_SKIP_PTD,
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(~sc->sc_host_isoc_map) | sc->sc_host_isoc_suspend_map);
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busy:
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return (1); /* busy */
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complete:
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saf1761_host_channel_free(sc, td);
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return (0); /* complete */
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}
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static void
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@ -2371,7 +2513,7 @@ static const struct usb_pipe_methods saf1761_otg_non_isoc_methods =
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};
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/*------------------------------------------------------------------------*
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* saf1761_otg isochronous support
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* saf1761_otg device side isochronous support
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*------------------------------------------------------------------------*/
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static void
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saf1761_otg_device_isoc_open(struct usb_xfer *xfer)
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@ -2452,6 +2594,88 @@ static const struct usb_pipe_methods saf1761_otg_device_isoc_methods =
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.start = saf1761_otg_device_isoc_start,
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};
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/*------------------------------------------------------------------------*
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* saf1761_otg host side isochronous support
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*------------------------------------------------------------------------*/
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static void
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saf1761_otg_host_isoc_open(struct usb_xfer *xfer)
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{
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return;
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}
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static void
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saf1761_otg_host_isoc_close(struct usb_xfer *xfer)
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{
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saf1761_otg_device_done(xfer, USB_ERR_CANCELLED);
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}
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static void
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saf1761_otg_host_isoc_enter(struct usb_xfer *xfer)
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{
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struct saf1761_otg_softc *sc = SAF1761_OTG_BUS2SC(xfer->xroot->bus);
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uint32_t temp;
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uint32_t nframes;
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DPRINTFN(6, "xfer=%p next=%d nframes=%d\n",
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xfer, xfer->endpoint->isoc_next, xfer->nframes);
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/* get the current frame index - we don't need the high bits */
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nframes = (SAF1761_READ_LE_4(sc, SOTG_FRINDEX) & SOTG_FRINDEX_MASK) >> 3;
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/*
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* check if the frame index is within the window where the
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* frames will be inserted
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*/
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temp = (nframes - xfer->endpoint->isoc_next) & (SOTG_FRINDEX_MASK >> 3);
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if ((xfer->endpoint->is_synced == 0) ||
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(temp < xfer->nframes)) {
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/*
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* If there is data underflow or the pipe queue is
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* empty we schedule the transfer a few frames ahead
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* of the current frame position. Else two isochronous
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* transfers might overlap.
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*/
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xfer->endpoint->isoc_next = (nframes + 3) & (SOTG_FRINDEX_MASK >> 3);
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xfer->endpoint->is_synced = 1;
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DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
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}
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/*
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* compute how many milliseconds the insertion is ahead of the
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* current frame position:
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*/
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temp = (xfer->endpoint->isoc_next - nframes) & (SOTG_FRINDEX_MASK >> 3);
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/*
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* pre-compute when the isochronous transfer will be finished:
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*/
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xfer->isoc_time_complete =
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usb_isoc_time_expand(&sc->sc_bus, nframes) + temp +
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xfer->nframes;
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/* compute frame number for next insertion */
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xfer->endpoint->isoc_next += xfer->nframes;
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/* setup TDs */
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saf1761_otg_setup_standard_chain(xfer);
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}
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static void
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saf1761_otg_host_isoc_start(struct usb_xfer *xfer)
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{
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/* start TD chain */
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saf1761_otg_start_standard_chain(xfer);
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}
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static const struct usb_pipe_methods saf1761_otg_host_isoc_methods =
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{
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.open = saf1761_otg_host_isoc_open,
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.close = saf1761_otg_host_isoc_close,
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.enter = saf1761_otg_host_isoc_enter,
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.start = saf1761_otg_host_isoc_start,
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};
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/*------------------------------------------------------------------------*
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* saf1761_otg root control support
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*------------------------------------------------------------------------*
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@ -3174,7 +3398,17 @@ saf1761_otg_xfer_setup(struct usb_setup_params *parm)
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td->ep_index = ep_no;
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td->ep_type = ep_type;
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td->dw1_value = dw1;
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td->uframe = 0;
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if (ep_type == UE_ISOCHRONOUS) {
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if (parm->udev->speed == USB_SPEED_HIGH) {
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uint8_t uframe_index = (ntd - 1 - n);
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uframe_index <<= usbd_xfer_get_fps_shift(xfer);
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td->uframe = (uframe_index & 7);
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} else {
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td->uframe = 0;
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}
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} else {
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td->uframe = 0;
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}
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if (ep_type == UE_INTERRUPT) {
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if (xfer->interval > 32)
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td->interval = (32 / 2) << 3;
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@ -3202,6 +3436,8 @@ static void
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saf1761_otg_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
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struct usb_endpoint *ep)
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{
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uint16_t mps;
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DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d\n",
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ep, udev->address,
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edesc->bEndpointAddress, udev->flags.usb_mode);
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@ -3211,6 +3447,20 @@ saf1761_otg_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *ede
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return;
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}
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/* Verify wMaxPacketSize */
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mps = UGETW(edesc->wMaxPacketSize);
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if (udev->speed == USB_SPEED_HIGH) {
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if ((mps >> 11) & 3) {
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DPRINTF("A packet multiplier different from "
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"1 is not supported\n");
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return;
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}
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}
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if (mps > SOTG_HS_MAX_PACKET_SIZE) {
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DPRINTF("Packet size %d bigger than %d\n",
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(int)mps, SOTG_HS_MAX_PACKET_SIZE);
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return;
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}
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if (udev->flags.usb_mode == USB_MODE_DEVICE) {
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if (udev->speed != USB_SPEED_FULL &&
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udev->speed != USB_SPEED_HIGH) {
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@ -3227,13 +3477,11 @@ saf1761_otg_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *ede
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}
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} else {
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switch (edesc->bmAttributes & UE_XFERTYPE) {
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case UE_CONTROL:
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case UE_BULK:
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case UE_INTERRUPT:
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ep->methods = &saf1761_otg_non_isoc_methods;
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case UE_ISOCHRONOUS:
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ep->methods = &saf1761_otg_host_isoc_methods;
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break;
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default:
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/* TODO */
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ep->methods = &saf1761_otg_non_isoc_methods;
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break;
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}
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}
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@ -183,6 +183,7 @@
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/* Host controller specific registers */
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#define SOTG_FRINDEX 0x002c
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#define SOTG_FRINDEX_MASK 0x3fff
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#define SOTG_CONFIGFLAG 0x0060
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#define SOTG_CONFIGFLAG_ENABLE (1 << 0)
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#define SOTG_PORTSC1 0x0064
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