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Bump up the read and write timeouts. The old value was too small for low

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speed transfers.

Sponsored by:	Rubicon Communications (Netgate)
This commit is contained in:
loos 2016-03-30 16:26:00 +00:00
parent 718fbb1dc6
commit 2a90b26b16
1 changed files with 2 additions and 2 deletions
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4
sys/arm/ti/ti_spi.c
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@ -333,7 +333,7 @@ ti_spi_fill_fifo(struct ti_spi_softc *sc)
timeout = 1000;
while (--timeout > 0 && (TI_SPI_READ(sc,
MCSPI_STAT_CH(sc->sc_cs)) & MCSPI_STAT_TXS) == 0) {
DELAY(1);
DELAY(100);
}
if (timeout == 0)
return (-1);
@ -366,7 +366,7 @@ ti_spi_drain_fifo(struct ti_spi_softc *sc)
timeout = 1000;
while (--timeout > 0 && (TI_SPI_READ(sc,
MCSPI_STAT_CH(sc->sc_cs)) & MCSPI_STAT_RXS) == 0) {
DELAY(1);
DELAY(100);
}
if (timeout == 0)
return (-1);