MFC r258168, r258170:
Add some more Intel HDA controller and CODEC IDs.
This commit is contained in:
parent
51a1cf7d15
commit
2ab2b6ae11
@ -78,11 +78,20 @@ static const struct {
|
||||
char quirks_on;
|
||||
char quirks_off;
|
||||
} hdac_devices[] = {
|
||||
{ HDA_INTEL_OAK, "Intel Oaktrail", 0, 0 },
|
||||
{ HDA_INTEL_BAY, "Intel BayTrail", 0, 0 },
|
||||
{ HDA_INTEL_HSW1, "Intel Haswell", 0, 0 },
|
||||
{ HDA_INTEL_HSW2, "Intel Haswell", 0, 0 },
|
||||
{ HDA_INTEL_HSW3, "Intel Haswell", 0, 0 },
|
||||
{ HDA_INTEL_CPT, "Intel Cougar Point", 0, 0 },
|
||||
{ HDA_INTEL_PATSBURG,"Intel Patsburg", 0, 0 },
|
||||
{ HDA_INTEL_PPT1, "Intel Panther Point", 0, 0 },
|
||||
{ HDA_INTEL_LPT1, "Intel Lynx Point", 0, 0 },
|
||||
{ HDA_INTEL_LPT2, "Intel Lynx Point", 0, 0 },
|
||||
{ HDA_INTEL_WELLS1, "Intel Wellsburg", 0, 0 },
|
||||
{ HDA_INTEL_WELLS2, "Intel Wellsburg", 0, 0 },
|
||||
{ HDA_INTEL_LPTLP1, "Intel Lynx Point-LP", 0, 0 },
|
||||
{ HDA_INTEL_LPTLP2, "Intel Lynx Point-LP", 0, 0 },
|
||||
{ HDA_INTEL_82801F, "Intel 82801F", 0, 0 },
|
||||
{ HDA_INTEL_63XXESB, "Intel 631x/632xESB", 0, 0 },
|
||||
{ HDA_INTEL_82801G, "Intel 82801G", 0, 0 },
|
||||
|
@ -41,6 +41,11 @@
|
||||
|
||||
/* Intel */
|
||||
#define INTEL_VENDORID 0x8086
|
||||
#define HDA_INTEL_OAK HDA_MODEL_CONSTRUCT(INTEL, 0x080a)
|
||||
#define HDA_INTEL_BAY HDA_MODEL_CONSTRUCT(INTEL, 0x0f04)
|
||||
#define HDA_INTEL_HSW1 HDA_MODEL_CONSTRUCT(INTEL, 0x0a0c)
|
||||
#define HDA_INTEL_HSW2 HDA_MODEL_CONSTRUCT(INTEL, 0x0c0c)
|
||||
#define HDA_INTEL_HSW3 HDA_MODEL_CONSTRUCT(INTEL, 0x0d0c)
|
||||
#define HDA_INTEL_CPT HDA_MODEL_CONSTRUCT(INTEL, 0x1c20)
|
||||
#define HDA_INTEL_PATSBURG HDA_MODEL_CONSTRUCT(INTEL, 0x1d20)
|
||||
#define HDA_INTEL_PPT1 HDA_MODEL_CONSTRUCT(INTEL, 0x1e20)
|
||||
@ -56,6 +61,10 @@
|
||||
#define HDA_INTEL_SCH HDA_MODEL_CONSTRUCT(INTEL, 0x811b)
|
||||
#define HDA_INTEL_LPT1 HDA_MODEL_CONSTRUCT(INTEL, 0x8c20)
|
||||
#define HDA_INTEL_LPT2 HDA_MODEL_CONSTRUCT(INTEL, 0x8c21)
|
||||
#define HDA_INTEL_WELLS1 HDA_MODEL_CONSTRUCT(INTEL, 0x8d20)
|
||||
#define HDA_INTEL_WELLS2 HDA_MODEL_CONSTRUCT(INTEL, 0x8d21)
|
||||
#define HDA_INTEL_LPTLP1 HDA_MODEL_CONSTRUCT(INTEL, 0x9c20)
|
||||
#define HDA_INTEL_LPTLP2 HDA_MODEL_CONSTRUCT(INTEL, 0x9c21)
|
||||
#define HDA_INTEL_ALL HDA_MODEL_CONSTRUCT(INTEL, 0xffff)
|
||||
|
||||
/* Nvidia */
|
||||
@ -605,6 +614,7 @@
|
||||
#define HDA_CODEC_INTELIP2 HDA_CODEC_CONSTRUCT(INTEL, 0x2804)
|
||||
#define HDA_CODEC_INTELCPT HDA_CODEC_CONSTRUCT(INTEL, 0x2805)
|
||||
#define HDA_CODEC_INTELPPT HDA_CODEC_CONSTRUCT(INTEL, 0x2806)
|
||||
#define HDA_CODEC_INTELHSW HDA_CODEC_CONSTRUCT(INTEL, 0x2807)
|
||||
#define HDA_CODEC_INTELCL HDA_CODEC_CONSTRUCT(INTEL, 0x29fb)
|
||||
#define HDA_CODEC_INTELXXXX HDA_CODEC_CONSTRUCT(INTEL, 0xffff)
|
||||
|
||||
|
@ -318,6 +318,7 @@ static const struct {
|
||||
{ HDA_CODEC_INTELIP2, 0, "Intel Ibex Peak" },
|
||||
{ HDA_CODEC_INTELCPT, 0, "Intel Cougar Point" },
|
||||
{ HDA_CODEC_INTELPPT, 0, "Intel Panther Point" },
|
||||
{ HDA_CODEC_INTELHSW, 0, "Intel Haswell" },
|
||||
{ HDA_CODEC_INTELCL, 0, "Intel Crestline" },
|
||||
{ HDA_CODEC_SII1390, 0, "Silicon Image SiI1390" },
|
||||
{ HDA_CODEC_SII1392, 0, "Silicon Image SiI1392" },
|
||||
|
Loading…
Reference in New Issue
Block a user