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Add RTL8211C(L) support.

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Disable advanced link-down power saving in phy reset.

Reported by:	nork
Tested by:	nork
This commit is contained in:
yongari 2008-07-02 08:10:18 +00:00
parent 991fbab98a
commit 2af52bdb8e
2 changed files with 15 additions and 2 deletions
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14
sys/dev/mii/rgephy.c
View File

@ -34,7 +34,7 @@
__FBSDID("$FreeBSD$");
/*
* Driver for the RealTek 8169S/8110S/8211B internal 10/100/1000 PHY.
* Driver for the RealTek 8169S/8110S/8211B/8211C internal 10/100/1000 PHY.
*/
#include <sys/param.h>
@ -531,6 +531,18 @@ rgephy_load_dspcode(struct mii_softc *sc)
static void
rgephy_reset(struct mii_softc *sc)
{
struct rgephy_softc *rsc;
uint16_t ssr;
rsc = (struct rgephy_softc *)sc;
if (rsc->mii_revision == 3) {
/* RTL8211C(L) */
ssr = PHY_READ(sc, RGEPHY_MII_SSR);
if ((ssr & RGEPHY_SSR_ALDPS) != 0) {
ssr &= ~RGEPHY_SSR_ALDPS;
PHY_WRITE(sc, RGEPHY_MII_SSR, ssr);
}
}
mii_phy_reset(sc);
DELAY(1000);

3
sys/dev/mii/rgephyreg.h
View File

@ -137,7 +137,7 @@
#define RGEPHY_EXTSTS_T_FD_CAP 0x2000 /* 1000base-T FD capable */
#define RGEPHY_EXTSTS_T_HD_CAP 0x1000 /* 1000base-T HD capable */
/* RTL8211B(L) */
/* RTL8211B(L)/RTL8211C(L) */
#define RGEPHY_MII_SSR 0x11 /* PHY Specific status register */
#define RGEPHY_SSR_S1000 0x8000 /* 1000Mbps */
#define RGEPHY_SSR_S100 0x4000 /* 100Mbps */
@ -148,6 +148,7 @@
#define RGEPHY_SSR_SPD_DPLX_RESOLVED 0x0800 /* speed/duplex resolved */
#define RGEPHY_SSR_LINK 0x0400 /* link up */
#define RGEPHY_SSR_MDI_XOVER 0x0040 /* MDI crossover */
#define RGEPHY_SSR_ALDPS 0x0008 /* RTL8211C(L) only */
#define RGEPHY_SSR_JABBER 0x0001 /* Jabber */
#endif /* _DEV_RGEPHY_MIIREG_H_ */