Implement STBC receive frame statistics.

The AR9280 and later can receive STBC.  This adds some statistics
tracking to count these frames.

A patch to athstats will be forthcoming.
This commit is contained in:
Adrian Chadd 2013-05-08 01:11:25 +00:00
parent 5906bf4984
commit 2c47932c88
6 changed files with 17 additions and 2 deletions

View File

@ -155,6 +155,7 @@ struct ath_rx_status {
#define HAL_RX_DECRYPT_BUSY 0x0040 /* decrypt was too slow */
#define HAL_RX_HI_RX_CHAIN 0x0080 /* SM power save: hi Rx chain control */
#define HAL_RX_IS_APSD 0x0100 /* Is ASPD trigger frame */
#define HAL_RX_STBC 0x0200 /* Is an STBC frame */
enum {
HAL_PHYERR_UNDERRUN = 0, /* Transmit underrun */

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@ -209,6 +209,14 @@ ar5416ProcRxDesc(struct ath_hal *ah, struct ath_desc *ds,
if (ads->ds_rxstatus3 & AR_2040)
rs->rs_flags |= HAL_RX_2040;
/*
* Only the AR9280 and later chips support STBC RX, so
* ensure we only set this bit for those chips.
*/
if (AR_SREV_MERLIN_10_OR_LATER(ah)
&& ads->ds_rxstatus3 & AR_STBCFrame)
rs->rs_flags |= HAL_RX_STBC;
if (ads->ds_rxstatus8 & AR_PreDelimCRCErr)
rs->rs_flags |= HAL_RX_DELIM_CRC_PRE;
if (ads->ds_rxstatus8 & AR_PostDelimCRCErr)

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@ -357,6 +357,7 @@ struct ar5416_desc {
#define AR_RxStatusRsvd30 0xfffff800
/* Owl 2.x only */
#define AR_DupFrame 0x00000004
#define AR_STBCFrame 0x00000008
#define AR_RxAntenna 0xffffff00
#define AR_RxAntenna_S 8

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@ -545,6 +545,8 @@ ath_rx_pkt(struct ath_softc *sc, struct ath_rx_status *rs, HAL_STATUS status,
sc->sc_stats.ast_rx_decrypt_busy_err++;
if (rs->rs_flags & HAL_RX_HI_RX_CHAIN)
sc->sc_stats.ast_rx_hi_rx_chain++;
if (rs->rs_flags & HAL_RX_STBC)
sc->sc_stats.ast_rx_stbc++;
#endif /* AH_SUPPORT_AR5416 */
if (rs->rs_status != 0) {

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@ -1076,6 +1076,9 @@ ath_sysctl_stats_attach(struct ath_softc *sc)
&sc->sc_stats.ast_rx_keymiss, 0, "");
SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_swfiltered", CTLFLAG_RD,
&sc->sc_stats.ast_tx_swfiltered, 0, "");
SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_stbc",
CTLFLAG_RD, &sc->sc_stats.ast_rx_stbc, 0,
"Number of STBC frames received");
/* Attach the RX phy error array */
ath_sysctl_stats_attach_rxphyerr(sc, child);

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@ -163,9 +163,9 @@ struct ath_stats {
u_int32_t ast_tx_mcastq_overflow; /* multicast queue overflow */
u_int32_t ast_rx_keymiss;
u_int32_t ast_tx_swfiltered;
u_int32_t ast_rx_stbc; /* RX STBC frame */
u_int32_t ast_tx_nodeq_overflow; /* node sw queue overflow */
u_int32_t ast_pad[14];
u_int32_t ast_pad[13];
};
#define SIOCGATHSTATS _IOWR('i', 137, struct ifreq)