MFC:
CF devices are ATA not ATAPI. Add support for the ALI/ULI M5288 AHCI part Busmaster DMA address fix in VIA 6421 case Add support for a few more Serverworks and lookalikes chips If current_heads or current_sectors in the disk cap page are zero, dont try to use the current_ geometry. This avoids a panic with BIOS'n that sets these to zero. Format mask lacks one bit. Approved by: re@
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8290450b78
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@ -639,7 +639,9 @@ ata_getparam(struct ata_device *atadev, int init)
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if (init) {
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sprintf(buffer, "%.40s/%.8s", atacap->model, atacap->revision);
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device_set_desc_copy(atadev->dev, buffer);
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if (atadev->param.config & ATA_PROTO_ATAPI) {
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if ((atadev->param.config & ATA_PROTO_ATAPI) &&
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(atadev->param.config != ATA_CFA_MAGIC1) &&
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(atadev->param.config != ATA_CFA_MAGIC2)) {
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if (atapi_dma && ch->dma &&
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(atadev->param.config & ATA_DRQ_MASK) != ATA_DRQ_INTR &&
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ata_umode(&atadev->param) >= ATA_UDMA2)
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@ -985,6 +985,13 @@ ata_ali_chipinit(device_t dev)
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ctlr->allocate = ata_ali_sata_allocate;
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ctlr->setmode = ata_sata_setmode;
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/* if we have a memory resource we can likely do AHCI */
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ctlr->r_type2 = SYS_RES_MEMORY;
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ctlr->r_rid2 = PCIR_BAR(5);
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if ((ctlr->r_res2 = bus_alloc_resource_any(dev, ctlr->r_type2,
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&ctlr->r_rid2, RF_ACTIVE)))
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return ata_ahci_chipinit(dev);
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/* enable PCI interrupt */
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pci_write_config(dev, PCIR_COMMAND,
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pci_read_config(dev, PCIR_COMMAND, 2) & ~0x0400, 2);
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@ -3952,14 +3959,17 @@ ata_serverworks_ident(device_t dev)
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struct ata_pci_controller *ctlr = device_get_softc(dev);
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struct ata_chip_id *idx;
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static struct ata_chip_id ids[] =
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{{ ATA_ROSB4, 0x00, SWKS33, 0x00, ATA_UDMA2, "ROSB4" },
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{ ATA_CSB5, 0x92, SWKS100, 0x00, ATA_UDMA5, "CSB5" },
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{ ATA_CSB5, 0x00, SWKS66, 0x00, ATA_UDMA4, "CSB5" },
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{ ATA_CSB6, 0x00, SWKS100, 0x00, ATA_UDMA5, "CSB6" },
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{ ATA_CSB6_1, 0x00, SWKS66, 0x00, ATA_UDMA4, "CSB6" },
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{ ATA_HT1000, 0x00, SWKS100, 0x00, ATA_UDMA5, "HT1000" },
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{ ATA_HT1000_S1, 0x00, SWKS100, 0x00, ATA_SA150, "HT1000 SATA" },
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{ ATA_HT1000_S2, 0x00, SWKSMIO, 0x00, ATA_SA150, "HT1000 SATA mmio" },
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{{ ATA_ROSB4, 0x00, SWKS33, 0, ATA_UDMA2, "ROSB4" },
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{ ATA_CSB5, 0x92, SWKS100, 0, ATA_UDMA5, "CSB5" },
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{ ATA_CSB5, 0x00, SWKS66, 0, ATA_UDMA4, "CSB5" },
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{ ATA_CSB6, 0x00, SWKS100, 0, ATA_UDMA5, "CSB6" },
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{ ATA_CSB6_1, 0x00, SWKS66, 0, ATA_UDMA4, "CSB6" },
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{ ATA_HT1000, 0x00, SWKS100, 0, ATA_UDMA5, "HT1000" },
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{ ATA_HT1000_S1, 0x00, SWKS100, 4, ATA_SA150, "HT1000" },
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{ ATA_HT1000_S2, 0x00, SWKSMIO, 4, ATA_SA150, "HT1000" },
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{ ATA_K2, 0x00, SWKSMIO, 4, ATA_SA150, "K2" },
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{ ATA_FRODO4, 0x00, SWKSMIO, 4, ATA_SA150, "Frodo4" },
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{ ATA_FRODO8, 0x00, SWKSMIO, 8, ATA_SA150, "Frodo8" },
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{ 0, 0, 0, 0, 0, 0}};
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char buffer[64];
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@ -3989,7 +3999,7 @@ ata_serverworks_chipinit(device_t dev)
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&ctlr->r_rid2, RF_ACTIVE)))
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return ENXIO;
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ctlr->channels = 4;
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ctlr->channels = ctlr->chip->cfg2;
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ctlr->allocate = ata_serverworks_allocate;
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ctlr->setmode = ata_sata_setmode;
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return 0;
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@ -4866,7 +4876,7 @@ ata_via_allocate(device_t dev)
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ata_default_registers(dev);
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for (i = ATA_BMCMD_PORT; i <= ATA_BMDTP_PORT; i++) {
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ch->r_io[i].res = ctlr->r_res1;
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ch->r_io[i].offset = i - ATA_BMCMD_PORT;
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ch->r_io[i].offset = (i - ATA_BMCMD_PORT)+(ch->unit * ATA_BMIOSIZE);
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}
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ata_pci_hw(dev);
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}
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@ -97,7 +97,8 @@ ad_attach(device_t dev)
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}
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device_set_ivars(dev, adp);
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if (atadev->param.atavalid & ATA_FLAG_54_58) {
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if ((atadev->param.atavalid & ATA_FLAG_54_58) &&
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atadev->param.current_heads && atadev->param.current_sectors) {
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adp->heads = atadev->param.current_heads;
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adp->sectors = atadev->param.current_sectors;
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adp->total_secs = (u_int32_t)atadev->param.current_size_1 |
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@ -266,6 +266,9 @@ struct ata_connect_task {
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#define ATA_HT1000 0x02141166
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#define ATA_HT1000_S1 0x024b1166
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#define ATA_HT1000_S2 0x024a1166
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#define ATA_K2 0x02401166
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#define ATA_FRODO4 0x02411166
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#define ATA_FRODO8 0x02421166
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#define ATA_SILICON_IMAGE_ID 0x1095
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#define ATA_SII3114 0x31141095
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@ -76,7 +76,7 @@ struct ar_softc {
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#define AR_F_SII_RAID 0x0800
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#define AR_F_SIS_RAID 0x1000
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#define AR_F_VIA_RAID 0x2000
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#define AR_F_FORMAT_MASK 0x1fff
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#define AR_F_FORMAT_MASK 0x3fff
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u_int generation;
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u_int64_t total_sectors;
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