From 2cb97c9dd6196830e2ce074ae0e86b842d0f28cf Mon Sep 17 00:00:00 2001 From: Neel Natu Date: Wed, 30 Apr 2014 02:08:27 +0000 Subject: [PATCH] Ignore writes to microcode update MSR. This MSR is accessed by RHEL7 guest. Add KTR tracepoints to annotate wrmsr and rdmsr VM exits. --- sys/amd64/vmm/intel/vmx.c | 3 +++ usr.sbin/bhyve/xmsr.c | 2 ++ 2 files changed, 5 insertions(+) diff --git a/sys/amd64/vmm/intel/vmx.c b/sys/amd64/vmm/intel/vmx.c index 4df127f74972..767bcc5132dc 100644 --- a/sys/amd64/vmm/intel/vmx.c +++ b/sys/amd64/vmm/intel/vmx.c @@ -1797,6 +1797,7 @@ vmx_exit_process(struct vmx *vmx, int vcpu, struct vm_exit *vmexit) vmm_stat_incr(vmx->vm, vcpu, VMEXIT_RDMSR, 1); retu = false; ecx = vmxctx->guest_rcx; + VCPU_CTR1(vmx->vm, vcpu, "rdmsr 0x%08x", ecx); error = emulate_rdmsr(vmx->vm, vcpu, ecx, &retu); if (error) { vmexit->exitcode = VM_EXITCODE_RDMSR; @@ -1815,6 +1816,8 @@ vmx_exit_process(struct vmx *vmx, int vcpu, struct vm_exit *vmexit) eax = vmxctx->guest_rax; ecx = vmxctx->guest_rcx; edx = vmxctx->guest_rdx; + VCPU_CTR2(vmx->vm, vcpu, "wrmsr 0x%08x value 0x%016lx", + ecx, (uint64_t)edx << 32 | eax); error = emulate_wrmsr(vmx->vm, vcpu, ecx, (uint64_t)edx << 32 | eax, &retu); if (error) { diff --git a/usr.sbin/bhyve/xmsr.c b/usr.sbin/bhyve/xmsr.c index ba94125a0900..63522bf023be 100644 --- a/usr.sbin/bhyve/xmsr.c +++ b/usr.sbin/bhyve/xmsr.c @@ -47,6 +47,8 @@ emulate_wrmsr(struct vmctx *ctx, int vcpu, uint32_t code, uint64_t val) case 0xd04: /* Sandy Bridge uncore PMC MSRs */ case 0xc24: return (0); + case 0x79: + return (0); /* IA32_BIOS_UPDT_TRIG MSR */ default: break; }