Fixes for panic experienced in test at Intel, when
doing bidirectional stress traffic on 82598. Also a couple bug fixes from Michael Tuexen, thank you!! Add a workaround into the header so that 8 REL can use the driver (adds local copy of ALTQ fix). MFC: in a few days
This commit is contained in:
Jack F Vogel
parent
a035b0afa0
commit
2d8f84cbea
@ -46,7 +46,7 @@ int ixgbe_display_debug_stats = 0;
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/*********************************************************************
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* Driver version
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*********************************************************************/
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char ixgbe_driver_version[] = "2.2.0";
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char ixgbe_driver_version[] = "2.2.1";
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/*********************************************************************
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* PCI Device ID Table
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@ -107,7 +107,7 @@ static void ixgbe_qflush(struct ifnet *);
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#endif
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static int ixgbe_ioctl(struct ifnet *, u_long, caddr_t);
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static void ixgbe_init(void *);
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static int ixgbe_init_locked(struct adapter *);
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static void ixgbe_init_locked(struct adapter *);
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static void ixgbe_stop(void *);
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static void ixgbe_media_status(struct ifnet *, struct ifmediareq *);
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static int ixgbe_media_change(struct ifnet *);
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@ -255,10 +255,10 @@ static int ixgbe_enable_msix = 1;
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TUNABLE_INT("hw.ixgbe.enable_msix", &ixgbe_enable_msix);
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/*
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* Header split has seemed to be beneficial in
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* most circumstances tested, so its on by default
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* however this variable will allow it to be disabled
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* for some debug purposes.
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* Header split: this causes the hardware to DMA
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* the header into a seperate mbuf from the payload,
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* it can be a performance win in some workloads, but
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* in others it actually hurts, its off by default.
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*/
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static bool ixgbe_header_split = FALSE;
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TUNABLE_INT("hw.ixgbe.hdr_split", &ixgbe_header_split);
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@ -795,6 +795,7 @@ static int
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ixgbe_mq_start(struct ifnet *ifp, struct mbuf *m)
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{
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struct adapter *adapter = ifp->if_softc;
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struct ix_queue *que;
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struct tx_ring *txr;
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int i = 0, err = 0;
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@ -803,12 +804,15 @@ ixgbe_mq_start(struct ifnet *ifp, struct mbuf *m)
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i = m->m_pkthdr.flowid % adapter->num_queues;
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txr = &adapter->tx_rings[i];
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que = &adapter->queues[i];
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if (IXGBE_TX_TRYLOCK(txr)) {
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err = ixgbe_mq_start_locked(ifp, txr, m);
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IXGBE_TX_UNLOCK(txr);
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} else
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} else {
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err = drbr_enqueue(ifp, txr->br, m);
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taskqueue_enqueue(que->tq, &que->que_task);
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}
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return (err);
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}
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@ -913,7 +917,7 @@ ixgbe_ioctl(struct ifnet * ifp, u_long command, caddr_t data)
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ifp->if_mtu = ifr->ifr_mtu;
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adapter->max_frame_size =
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ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
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error = ixgbe_init_locked(adapter);
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ixgbe_init_locked(adapter);
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IXGBE_CORE_UNLOCK(adapter);
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}
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break;
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@ -928,7 +932,7 @@ ixgbe_ioctl(struct ifnet * ifp, u_long command, caddr_t data)
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ixgbe_set_promisc(adapter);
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}
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} else
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error = ixgbe_init_locked(adapter);
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ixgbe_init_locked(adapter);
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} else
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if (ifp->if_drv_flags & IFF_DRV_RUNNING)
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ixgbe_stop(adapter);
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@ -965,7 +969,7 @@ ixgbe_ioctl(struct ifnet * ifp, u_long command, caddr_t data)
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ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
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if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
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IXGBE_CORE_LOCK(adapter);
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error = ixgbe_init_locked(adapter);
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ixgbe_init_locked(adapter);
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IXGBE_CORE_UNLOCK(adapter);
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}
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VLAN_CAPABILITIES(ifp);
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@ -993,7 +997,7 @@ ixgbe_ioctl(struct ifnet * ifp, u_long command, caddr_t data)
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**********************************************************************/
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#define IXGBE_MHADD_MFS_SHIFT 16
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static int
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static void
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ixgbe_init_locked(struct adapter *adapter)
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{
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struct ifnet *ifp = adapter->ifp;
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@ -1004,7 +1008,6 @@ ixgbe_init_locked(struct adapter *adapter)
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mtx_assert(&adapter->core_mtx, MA_OWNED);
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INIT_DEBUGOUT("ixgbe_init: begin");
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ixgbe_reset_hw(hw);
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hw->adapter_stopped = FALSE;
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ixgbe_stop_adapter(hw);
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callout_stop(&adapter->timer);
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@ -1022,10 +1025,10 @@ ixgbe_init_locked(struct adapter *adapter)
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if (ixgbe_setup_transmit_structures(adapter)) {
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device_printf(dev,"Could not setup transmit structures\n");
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ixgbe_stop(adapter);
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return (ENOMEM);
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return;
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}
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ixgbe_init_hw(hw);
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ixgbe_reset_hw(hw);
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ixgbe_initialize_transmit_units(adapter);
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/* Setup Multicast table */
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@ -1044,7 +1047,7 @@ ixgbe_init_locked(struct adapter *adapter)
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if (ixgbe_setup_receive_structures(adapter)) {
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device_printf(dev,"Could not setup receive structures\n");
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ixgbe_stop(adapter);
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return (ENOMEM);
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return;
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}
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/* Configure RX settings */
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@ -1073,12 +1076,14 @@ ixgbe_init_locked(struct adapter *adapter)
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ifp->if_hwassist = 0;
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if (ifp->if_capenable & IFCAP_TSO4)
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ifp->if_hwassist |= CSUM_TSO;
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if (ifp->if_capenable & IFCAP_TXCSUM)
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if (ifp->if_capenable & IFCAP_TXCSUM) {
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ifp->if_hwassist |= (CSUM_TCP | CSUM_UDP);
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#if __FreeBSD_version >= 800000
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if (hw->mac.type == ixgbe_mac_82599EB)
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ifp->if_hwassist |= CSUM_SCTP;
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if (hw->mac.type == ixgbe_mac_82599EB)
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ifp->if_hwassist |= CSUM_SCTP;
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#endif
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}
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/* Set MTU size */
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if (ifp->if_mtu > ETHERMTU) {
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mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
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@ -1164,7 +1169,7 @@ ixgbe_init_locked(struct adapter *adapter)
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if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
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device_printf(dev,
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"Unsupported SFP+ module type was detected.\n");
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return (EIO);
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return;
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}
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}
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@ -1181,7 +1186,7 @@ ixgbe_init_locked(struct adapter *adapter)
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ifp->if_drv_flags |= IFF_DRV_RUNNING;
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ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
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return (0);
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return;
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}
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static void
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@ -3632,9 +3637,11 @@ ixgbe_setup_receive_ring(struct rx_ring *rxr)
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goto skip_head;
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/* First the header */
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rxbuf->m_head = m_gethdr(M_DONTWAIT, MT_DATA);
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if (rxbuf->m_head == NULL)
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rxbuf->m_head = m_gethdr(M_WAITOK, MT_DATA);
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if (rxbuf->m_head == NULL) {
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error = ENOBUFS;
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goto fail;
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}
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m_adj(rxbuf->m_head, ETHER_ALIGN);
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mh = rxbuf->m_head;
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mh->m_len = mh->m_pkthdr.len = MHLEN;
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@ -3652,10 +3659,12 @@ ixgbe_setup_receive_ring(struct rx_ring *rxr)
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skip_head:
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/* Now the payload cluster */
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rxbuf->m_pack = m_getjcl(M_DONTWAIT, MT_DATA,
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rxbuf->m_pack = m_getjcl(M_WAITOK, MT_DATA,
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M_PKTHDR, adapter->rx_mbuf_sz);
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if (rxbuf->m_pack == NULL)
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if (rxbuf->m_pack == NULL) {
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error = ENOBUFS;
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goto fail;
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}
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mp = rxbuf->m_pack;
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mp->m_pkthdr.len = mp->m_len = adapter->rx_mbuf_sz;
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/* Get the memory mapping */
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@ -4036,16 +4045,16 @@ ixgbe_rxeof(struct ix_queue *que, int count)
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IXGBE_RX_LOCK(rxr);
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/* Sync the ring. */
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bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map,
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BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
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for (i = rxr->next_to_check; count != 0;) {
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struct mbuf *sendmp, *mh, *mp;
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u32 rsc, ptype;
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u16 hlen, plen, hdr, vtag;
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bool eop;
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/* Sync the ring. */
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bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map,
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BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
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cur = &rxr->rx_base[i];
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staterr = le32toh(cur->wb.upper.status_error);
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@ -473,4 +473,17 @@ ixgbe_is_sfp(struct ixgbe_hw *hw)
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}
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}
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/* Workaround to make 8.0 buildable */
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#if __FreeBSD_version < 800504
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static __inline int
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drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br)
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{
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#ifdef ALTQ
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if (ALTQ_IS_ENABLED(&ifp->if_snd))
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return (1);
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#endif
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return (!buf_ring_empty(br));
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}
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#endif
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#endif /* _IXGBE_H_ */
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