Make interrupt dispatching MP safe. Use GPU interrupt bit in per-core

interrupt status register to process shared interrupts only if the bit
is active and only on core to which they are routed.

Reviewed by:	imp, loos
Approved by:	kib (mentor)
Differential Revision:	https://reviews.freebsd.org/D3723
This commit is contained in:
Svatopluk Kraus 2015-11-06 17:12:33 +00:00
parent ca84d42993
commit 3084b64cd9
3 changed files with 6 additions and 2 deletions

View File

@ -163,7 +163,9 @@ arm_get_next_irq(int last_irq)
irq = 0;
#ifdef SOC_BCM2836
if ((ret = bcm2836_get_next_irq(irq)) >= 0)
if ((ret = bcm2836_get_next_irq(irq)) < 0)
return (-1);
if (ret != BCM2836_GPU_IRQ)
return (ret + BANK3_START);
#endif

View File

@ -52,7 +52,7 @@ __FBSDID("$FreeBSD$");
#define ARM_LOCAL_INT_TIMER(n) (0x40 + (n) * 4)
#define ARM_LOCAL_INT_MAILBOX(n) (0x50 + (n) * 4)
#define ARM_LOCAL_INT_PENDING(n) (0x60 + (n) * 4)
#define INT_PENDING_MASK 0x01f
#define INT_PENDING_MASK 0x011f
#define MAILBOX0_IRQ 4
#define MAILBOX0_IRQEN (1 << 0)

View File

@ -30,6 +30,8 @@
#ifndef _BCM2815_BCM2836_H
#define _BCM2815_BCM2836_H
#define BCM2836_GPU_IRQ 8
int bcm2836_get_next_irq(int);
void bcm2836_mask_irq(uintptr_t);
void bcm2836_unmask_irq(uintptr_t);