From 3091d36445057524e30a2c596c2121474854a8c4 Mon Sep 17 00:00:00 2001 From: Adrian Chadd Date: Wed, 1 Jun 2016 03:24:53 +0000 Subject: [PATCH] [ath_hal] add support for QCA9565 for configuring the bluetooth antenna LNA diversity. Notably, this also sets AR_BTCOEX_WL_LNADIV to FORCE_ON, so LNA diversity is always enabled and under control of the wifi chip. Tested: * QCA9565, STA + bluetooth mode Obtained from: Linux ath9k --- .../dev/ath/ath_hal/ar9300/ar9300_reset.c | 37 +++++++++++++++++-- 1 file changed, 34 insertions(+), 3 deletions(-) diff --git a/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_reset.c b/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_reset.c index 3a95c353a847..ee16ca02a7a6 100644 --- a/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_reset.c +++ b/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_reset.c @@ -5340,6 +5340,9 @@ ar9300_reset(struct ath_hal *ah, HAL_OPMODE opmode, struct ieee80211_channel *ch ar9300_set_smart_antenna(ah, ahp->ah_smartantenna_enable); + if (AR_SREV_APHRODITE(ah) && ahp->ah_lna_div_use_bt_ant_enable) + OS_REG_SET_BIT(ah, AR_BTCOEX_WL_LNADIV, AR_BTCOEX_WL_LNADIV_FORCE_ON); + if (ahp->ah_skip_rx_iq_cal && !is_scan) { /* restore RX Cal result if existing */ ar9300_rx_iq_cal_restore(ah); @@ -6385,6 +6388,9 @@ ar9300_ant_ctrl_set_lna_div_use_bt_ant(struct ath_hal *ah, HAL_BOOL enable, cons struct ath_hal_private *ahpriv = AH_PRIVATE(ah); HAL_CAPABILITIES *pcap = &ahpriv->ah_caps; + HALDEBUG(ah, HAL_DEBUG_RESET | HAL_DEBUG_BT_COEX, + "%s: called; enable=%d\n", __func__, enable); + if (AR_SREV_POSEIDON(ah)) { // Make sure this scheme is only used for WB225(Astra) ahp->ah_lna_div_use_bt_ant_enable = enable; @@ -6454,10 +6460,35 @@ ar9300_ant_ctrl_set_lna_div_use_bt_ant(struct ath_hal *ah, HAL_BOOL enable, cons } return AH_TRUE; - } else { + } else if (AR_SREV_APHRODITE(ah)) { + ahp->ah_lna_div_use_bt_ant_enable = enable; + if (enable) { + OS_REG_SET_BIT(ah, AR_PHY_MC_GAIN_CTRL, ANT_DIV_ENABLE); + OS_REG_SET_BIT(ah, AR_PHY_MC_GAIN_CTRL, (1 << MULTICHAIN_GAIN_CTRL__ENABLE_ANT_SW_RX_PROT__SHIFT)); + OS_REG_SET_BIT(ah, AR_PHY_CCK_DETECT, AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV); + OS_REG_SET_BIT(ah, AR_PHY_RESTART, RESTART__ENABLE_ANT_FAST_DIV_M2FLAG__MASK); + OS_REG_SET_BIT(ah, AR_BTCOEX_WL_LNADIV, AR_BTCOEX_WL_LNADIV_FORCE_ON); + } else { + OS_REG_CLR_BIT(ah, AR_PHY_MC_GAIN_CTRL, ANT_DIV_ENABLE); + OS_REG_CLR_BIT(ah, AR_PHY_MC_GAIN_CTRL, (1 << MULTICHAIN_GAIN_CTRL__ENABLE_ANT_SW_RX_PROT__SHIFT)); + OS_REG_CLR_BIT(ah, AR_PHY_CCK_DETECT, AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV); + OS_REG_CLR_BIT(ah, AR_PHY_RESTART, RESTART__ENABLE_ANT_FAST_DIV_M2FLAG__MASK); + OS_REG_CLR_BIT(ah, AR_BTCOEX_WL_LNADIV, AR_BTCOEX_WL_LNADIV_FORCE_ON); + + regval = OS_REG_READ(ah, AR_PHY_MC_GAIN_CTRL); + regval &= (~(MULTICHAIN_GAIN_CTRL__ANT_DIV_MAIN_LNACONF__MASK | + MULTICHAIN_GAIN_CTRL__ANT_DIV_ALT_LNACONF__MASK | + MULTICHAIN_GAIN_CTRL__ANT_DIV_ALT_GAINTB__MASK | + MULTICHAIN_GAIN_CTRL__ANT_DIV_MAIN_GAINTB__MASK)); + regval |= (HAL_ANT_DIV_COMB_LNA1 << + MULTICHAIN_GAIN_CTRL__ANT_DIV_MAIN_LNACONF__SHIFT); + regval |= (HAL_ANT_DIV_COMB_LNA2 << + MULTICHAIN_GAIN_CTRL__ANT_DIV_ALT_LNACONF__SHIFT); + + OS_REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval); + } return AH_TRUE; } - - /* XXX TODO: Add AR9565 support? */ + return AH_TRUE; } #endif /* ATH_ANT_DIV_COMB */