Add support for the Non-maskable interrupt driver found in the Allwinner A20 and A31 SoCs.
This is normally used for the PMU. Reviewed by: andrew Approved by: andrew (mentor) Differential Revision: https://reviews.freebsd.org/D5663
This commit is contained in:
Emmanuel Vadot
parent
f8628d5bf2
commit
30c05743c4
396
sys/arm/allwinner/aw_nmi.c
Normal file
396
sys/arm/allwinner/aw_nmi.c
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@ -0,0 +1,396 @@
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/*-
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* Copyright (c) 2016 Emmanuel Vadot <manu@freebsd.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_platform.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/proc.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include "pic_if.h"
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#define NMI_IRQ_CTRL_REG 0x0
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#define NMI_IRQ_LOW_LEVEL 0x0
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#define NMI_IRQ_LOW_EDGE 0x1
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#define NMI_IRQ_HIGH_LEVEL 0x2
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#define NMI_IRQ_HIGH_EDGE 0x3
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#define NMI_IRQ_PENDING_REG 0x4
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#define NMI_IRQ_ACK (1U << 0)
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#define A20_NMI_IRQ_ENABLE_REG 0x8
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#define A31_NMI_IRQ_ENABLE_REG 0x34
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#define NMI_IRQ_ENABLE (1U << 0)
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#define SC_NMI_READ(_sc, _reg) bus_read_4(_sc->res[0], _reg)
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#define SC_NMI_WRITE(_sc, _reg, _val) bus_write_4(_sc->res[0], _reg, _val)
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static struct resource_spec aw_nmi_res_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE },
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{ SYS_RES_IRQ, 0, RF_ACTIVE },
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{ -1, 0, 0 }
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};
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struct aw_nmi_intr {
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struct intr_irqsrc isrc;
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u_int irq;
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enum intr_polarity pol;
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enum intr_trigger tri;
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};
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struct aw_nmi_softc {
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device_t dev;
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struct resource * res[2];
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void * intrcookie;
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struct aw_nmi_intr intr;
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uint8_t enable_reg;
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};
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#define A20_NMI 1
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#define A31_NMI 2
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static struct ofw_compat_data compat_data[] = {
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{"allwinner,sun7i-a20-sc-nmi", A20_NMI},
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{"allwinner,sun6i-a31-sc-nmi", A31_NMI},
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{NULL, 0},
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};
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static int
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aw_nmi_intr(void *arg)
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{
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struct aw_nmi_softc *sc;
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sc = arg;
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if (SC_NMI_READ(sc, NMI_IRQ_PENDING_REG) == 0) {
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device_printf(sc->dev, "Spurious interrupt\n");
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return (FILTER_HANDLED);
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}
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if (intr_isrc_dispatch(&sc->intr.isrc, curthread->td_intr_frame) != 0) {
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SC_NMI_WRITE(sc, sc->enable_reg, !NMI_IRQ_ENABLE);
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device_printf(sc->dev, "Stray interrupt, NMI disabled\n");
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}
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return (FILTER_HANDLED);
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}
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static void
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aw_nmi_enable_intr(device_t dev, struct intr_irqsrc *isrc)
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{
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struct aw_nmi_softc *sc;
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sc = device_get_softc(dev);
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SC_NMI_WRITE(sc, sc->enable_reg, NMI_IRQ_ENABLE);
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}
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static void
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aw_nmi_disable_intr(device_t dev, struct intr_irqsrc *isrc)
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{
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struct aw_nmi_softc *sc;
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sc = device_get_softc(dev);
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SC_NMI_WRITE(sc, sc->enable_reg, !NMI_IRQ_ENABLE);
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}
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static int
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aw_nmi_map_fdt(device_t dev, u_int ncells, pcell_t *cells, u_int *irqp,
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enum intr_polarity *polp, enum intr_trigger *trigp)
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{
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u_int irq, tripol;
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enum intr_polarity pol;
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enum intr_trigger trig;
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if (ncells != 2) {
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device_printf(dev, "Invalid #interrupt-cells\n");
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return (EINVAL);
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}
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irq = cells[0];
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if (irq != 0) {
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device_printf(dev, "Controller only support irq 0\n");
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return (EINVAL);
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}
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tripol = cells[1];
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switch (tripol) {
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case IRQ_TYPE_EDGE_RISING:
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trig = INTR_TRIGGER_EDGE;
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pol = INTR_POLARITY_HIGH;
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break;
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case IRQ_TYPE_EDGE_FALLING:
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trig = INTR_TRIGGER_EDGE;
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pol = INTR_POLARITY_LOW;
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break;
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case IRQ_TYPE_LEVEL_HIGH:
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trig = INTR_TRIGGER_LEVEL;
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pol = INTR_POLARITY_HIGH;
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break;
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case IRQ_TYPE_LEVEL_LOW:
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trig = INTR_TRIGGER_LEVEL;
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pol = INTR_POLARITY_LOW;
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break;
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default:
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device_printf(dev, "unsupported trigger/polarity 0x%2x\n",
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tripol);
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return (ENOTSUP);
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}
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*irqp = irq;
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if (polp != NULL)
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*polp = pol;
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if (trigp != NULL)
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*trigp = trig;
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return (0);
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}
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static int
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aw_nmi_map_intr(device_t dev, struct intr_map_data *data,
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struct intr_irqsrc **isrcp)
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{
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struct aw_nmi_softc *sc;
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int error;
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u_int irq;
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sc = device_get_softc(dev);
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if (data->type != INTR_MAP_DATA_FDT)
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return (ENOTSUP);
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error = aw_nmi_map_fdt(dev, data->fdt.ncells, data->fdt.cells, &irq,
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NULL, NULL);
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if (error == 0)
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*isrcp = &sc->intr.isrc;
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return (error);
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}
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static int
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aw_nmi_setup_intr(device_t dev, struct intr_irqsrc *isrc,
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struct resource *res, struct intr_map_data *data)
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{
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struct aw_nmi_softc *sc;
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struct aw_nmi_intr *nmi_intr;
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int error, icfg;
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u_int irq;
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enum intr_trigger trig;
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enum intr_polarity pol;
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sc = device_get_softc(dev);
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nmi_intr = (struct aw_nmi_intr *)isrc;
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/* Get config for interrupt. */
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if (data == NULL || data->type != INTR_MAP_DATA_FDT)
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return (ENOTSUP);
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error = aw_nmi_map_fdt(dev, data->fdt.ncells, data->fdt.cells, &irq,
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&pol, &trig);
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if (error != 0)
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return (error);
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if (nmi_intr->irq != irq)
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return (EINVAL);
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/* Compare config if this is not first setup. */
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if (isrc->isrc_handlers != 0) {
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if (pol != nmi_intr->pol || trig != nmi_intr->tri)
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return (EINVAL);
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else
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return (0);
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}
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nmi_intr->pol = pol;
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nmi_intr->tri = trig;
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if (trig == INTR_TRIGGER_LEVEL) {
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if (pol == INTR_POLARITY_LOW)
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icfg = NMI_IRQ_LOW_LEVEL;
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else
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icfg = NMI_IRQ_HIGH_LEVEL;
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} else {
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if (pol == INTR_POLARITY_HIGH)
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icfg = NMI_IRQ_HIGH_EDGE;
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else
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icfg = NMI_IRQ_LOW_EDGE;
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}
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SC_NMI_WRITE(sc, NMI_IRQ_CTRL_REG, icfg);
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return (0);
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}
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static int
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aw_nmi_teardown_intr(device_t dev, struct intr_irqsrc *isrc,
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struct resource *res, struct intr_map_data *data)
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{
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struct aw_nmi_softc *sc;
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sc = device_get_softc(dev);
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if (isrc->isrc_handlers == 0) {
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sc->intr.pol = INTR_POLARITY_CONFORM;
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sc->intr.tri = INTR_TRIGGER_CONFORM;
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SC_NMI_WRITE(sc, sc->enable_reg, !NMI_IRQ_ENABLE);
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}
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return (0);
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}
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static void
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aw_nmi_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
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{
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aw_nmi_disable_intr(dev, isrc);
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}
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static void
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aw_nmi_post_ithread(device_t dev, struct intr_irqsrc *isrc)
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{
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arm_irq_memory_barrier(0);
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aw_nmi_enable_intr(dev, isrc);
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}
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static void
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aw_nmi_post_filter(device_t dev, struct intr_irqsrc *isrc)
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{
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struct aw_nmi_softc *sc;
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sc = device_get_softc(dev);
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arm_irq_memory_barrier(0);
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SC_NMI_WRITE(sc, NMI_IRQ_PENDING_REG, NMI_IRQ_ACK);
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}
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static int
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aw_nmi_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
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return (ENXIO);
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device_set_desc(dev, "Allwinner NMI Controller");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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aw_nmi_attach(device_t dev)
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{
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struct aw_nmi_softc *sc;
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phandle_t xref;
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sc = device_get_softc(dev);
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sc->dev = dev;
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if (bus_alloc_resources(dev, aw_nmi_res_spec, sc->res) != 0) {
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device_printf(dev, "can't allocate device resources\n");
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return (ENXIO);
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}
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if ((bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC,
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aw_nmi_intr, NULL, sc, &sc->intrcookie))) {
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device_printf(dev, "unable to register interrupt handler\n");
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bus_release_resources(dev, aw_nmi_res_spec, sc->res);
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return (ENXIO);
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}
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switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data) {
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case A20_NMI:
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sc->enable_reg = A20_NMI_IRQ_ENABLE_REG;
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break;
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case A31_NMI:
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sc->enable_reg = A31_NMI_IRQ_ENABLE_REG;
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break;
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}
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/* Disable and clear interrupts */
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SC_NMI_WRITE(sc, sc->enable_reg, !NMI_IRQ_ENABLE);
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SC_NMI_WRITE(sc, NMI_IRQ_PENDING_REG, NMI_IRQ_ACK);
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xref = OF_xref_from_node(ofw_bus_get_node(dev));
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/* Register our isrc */
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sc->intr.irq = 0;
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sc->intr.pol = INTR_POLARITY_CONFORM;
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sc->intr.tri = INTR_TRIGGER_CONFORM;
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if (intr_isrc_register(&sc->intr.isrc, sc->dev, 0, "%s,%u",
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device_get_nameunit(sc->dev), sc->intr.irq) != 0)
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goto error;
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if (intr_pic_register(dev, (intptr_t)xref) != 0) {
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device_printf(dev, "could not register pic\n");
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goto error;
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}
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return (0);
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error:
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bus_teardown_intr(dev, sc->res[1], sc->intrcookie);
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bus_release_resources(dev, aw_nmi_res_spec, sc->res);
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return (ENXIO);
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}
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static device_method_t aw_nmi_methods[] = {
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DEVMETHOD(device_probe, aw_nmi_probe),
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DEVMETHOD(device_attach, aw_nmi_attach),
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/* Interrupt controller interface */
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DEVMETHOD(pic_disable_intr, aw_nmi_disable_intr),
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DEVMETHOD(pic_enable_intr, aw_nmi_enable_intr),
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DEVMETHOD(pic_map_intr, aw_nmi_map_intr),
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DEVMETHOD(pic_setup_intr, aw_nmi_setup_intr),
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DEVMETHOD(pic_teardown_intr, aw_nmi_teardown_intr),
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DEVMETHOD(pic_post_filter, aw_nmi_post_filter),
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DEVMETHOD(pic_post_ithread, aw_nmi_post_ithread),
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DEVMETHOD(pic_pre_ithread, aw_nmi_pre_ithread),
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{0, 0},
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};
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static driver_t aw_nmi_driver = {
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"aw_nmi",
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aw_nmi_methods,
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sizeof(struct aw_nmi_softc),
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};
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static devclass_t aw_nmi_devclass;
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EARLY_DRIVER_MODULE(aw_nmi, simplebus, aw_nmi_driver,
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aw_nmi_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST);
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@ -10,6 +10,7 @@ arm/allwinner/aw_usbphy.c optional ehci
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arm/allwinner/a10_gpio.c optional gpio
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arm/allwinner/a10_mmc.c optional mmc
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arm/allwinner/a10_sramc.c standard
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arm/allwinner/aw_nmi.c optional intrng
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arm/allwinner/aw_if_dwc.c optional dwc
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arm/allwinner/aw_rtc.c standard
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arm/allwinner/aw_wdog.c standard
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