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Make the meaning of the 'mask' argument to 'set_intr_mask(mask)' consistent

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with the meaning of IM bits in the status register.

Reviewed by:	jmallett, jchandra
This commit is contained in:
neel 2010-09-15 05:10:50 +00:00
parent 2773ca57a0
commit 310427c33e
5 changed files with 5 additions and 5 deletions
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2
sys/mips/cavium/octeon_mp.c
View File

@ -96,7 +96,7 @@ platform_init_ap(int cpuid)
*/
clock_int_mask = hard_int_mask(5);
ipi_int_mask = hard_int_mask(platform_ipi_intrnum());
set_intr_mask(MIPS_SR_INT_MASK & ~(ipi_int_mask | clock_int_mask));
set_intr_mask(ipi_int_mask | clock_int_mask);
mips_wbflush();
}

2
sys/mips/include/cpufunc.h
View File

@ -272,7 +272,7 @@ set_intr_mask(uint32_t mask)
uint32_t ostatus;
ostatus = mips_rd_status();
mask = (ostatus & ~MIPS_SR_INT_MASK) | (~mask & MIPS_SR_INT_MASK);
mask = (ostatus & ~MIPS_SR_INT_MASK) | (mask & MIPS_SR_INT_MASK);
mips_wr_status(mask);
return (ostatus);
}

2
sys/mips/mips/machdep.c
View File

@ -356,7 +356,7 @@ mips_vector_init(void)
* Mask all interrupts. Each interrupt will be enabled
* when handler is installed for it
*/
set_intr_mask(MIPS_SR_INT_MASK);
set_intr_mask(0);
/* Clear BEV in SR so we start handling our own exceptions */
mips_wr_status(mips_rd_status() & ~MIPS_SR_BEV);

2
sys/mips/mips/trap.c
View File

@ -304,7 +304,7 @@ trap(struct trapframe *trapframe)
* return to userland.
*/
if (trapframe->sr & MIPS_SR_INT_IE) {
set_intr_mask(~(trapframe->sr & MIPS_SR_INT_MASK));
set_intr_mask(trapframe->sr & MIPS_SR_INT_MASK);
intr_enable();
} else {
intr_disable();

2
sys/mips/sibyte/sb_machdep.c
View File

@ -370,7 +370,7 @@ platform_init_ap(int cpuid)
*/
clock_int_mask = hard_int_mask(5);
ipi_int_mask = hard_int_mask(platform_ipi_intrnum());
set_intr_mask(MIPS_SR_INT_MASK & ~(ipi_int_mask | clock_int_mask));
set_intr_mask(ipi_int_mask | clock_int_mask);
}
int