Add two new CPUID bits for AMD CPUs, i. e., SVM and extended APIC register.
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@ -306,8 +306,8 @@ printcpuinfo(void)
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"\020"
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"\001LAHF" /* LAHF/SAHF in long mode */
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"\002CMP" /* CMP legacy */
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"\003<b2>"
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"\004<b3>"
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"\003SVM" /* Secure Virtual Mode */
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"\004ExtAPIC" /* Extended APIC register */
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"\005CR8" /* CR8 in legacy mode */
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"\006<b5>"
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"\007<b6>"
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@ -135,6 +135,8 @@
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#define AMDID2_LAHF 0x00000001
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#define AMDID2_CMP 0x00000002
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#define AMDID2_SVM 0x00000004
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#define AMDID2_EXT_APIC 0x00000008
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#define AMDID2_CR8 0x00000010
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/*
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@ -813,8 +813,8 @@ printcpuinfo(void)
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"\020"
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"\001LAHF" /* LAHF/SAHF in long mode */
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"\002CMP" /* CMP legacy */
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"\003<b2>"
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"\004<b3>"
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"\003SVM" /* Secure Virtual Mode */
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"\004ExtAPIC" /* Extended APIC register */
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"\005CR8" /* CR8 in legacy mode */
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"\006<b5>"
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"\007<b6>"
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@ -122,6 +122,8 @@
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#define AMDID2_LAHF 0x00000001
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#define AMDID2_CMP 0x00000002
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#define AMDID2_SVM 0x00000004
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#define AMDID2_EXT_APIC 0x00000008
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#define AMDID2_CR8 0x00000010
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/*
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