Include the MXCSR initial values, based on the AMD docs. This file
should really be renamed to fpu.h and npx.c to fpu.c since its part of the core architecture on amd64 systems, not an isa 'numeric processor extension'.
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@ -95,6 +95,8 @@ struct savefpu {
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* intermediate values are stored in memory or in FPU registers.
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*/
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#define __INITIAL_NPXCW__ 0x127F
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#define __INITIAL_MXCSR__ 0x1F80
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#define __INITIAL_MXCSR_MASK__ 0xFFBF
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#ifdef _KERNEL
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int npxdna(void);
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@ -95,6 +95,8 @@ struct savefpu {
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* intermediate values are stored in memory or in FPU registers.
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*/
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#define __INITIAL_NPXCW__ 0x127F
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#define __INITIAL_MXCSR__ 0x1F80
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#define __INITIAL_MXCSR_MASK__ 0xFFBF
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#ifdef _KERNEL
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int npxdna(void);
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