Add in OS_REG_BIT_SET, a macro which does what it says it does.
This will be used in an upcoming commit to the ar5212 HAL.
This commit is contained in:
parent
3f3087fd02
commit
31a47d8c14
@ -472,6 +472,8 @@ isBigEndian(void)
|
||||
OS_REG_WRITE(_a, _r, OS_REG_READ(_a, _r) | (_f))
|
||||
#define OS_REG_CLR_BIT(_a, _r, _f) \
|
||||
OS_REG_WRITE(_a, _r, OS_REG_READ(_a, _r) &~ (_f))
|
||||
#define OS_REG_IS_BIT_SET(_a, _r, _f) \
|
||||
((OS_REG_READ(_a, _r) & (_f)) != 0)
|
||||
|
||||
/* Analog register writes may require a delay between each one (eg Merlin?) */
|
||||
#define OS_A_REG_RMW_FIELD(_a, _r, _f, _v) \
|
||||
|
Loading…
Reference in New Issue
Block a user