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Allow RT3350 CPU clock to be detected as part of RT3050/RT3052 detection

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OpenWRT's dts files treat RT3050/RT3052/RT3350 within the same SoC dtsi
file, so we need to distinguish between the three dynamically, mainly
because the bit we use to determine the clock speed on RT3050/RT3052
can actually be floating on RT3350 and RT3350 is always at 320MHz.

Approved by:	adrian (mentor)
Sponsored by:	Smartcom - Bulgaria AD
Differential Revision:	https://reviews.freebsd.org/D5983
This commit is contained in:
Stanislav Galabov 2016-04-18 06:15:58 +00:00
parent d919e0d513
commit 3378bfdb23
2 changed files with 12 additions and 8 deletions
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18
sys/mips/mediatek/mtk_soc.c
View File

@ -76,13 +76,17 @@ static const struct ofw_compat_data compat_data[] = {
static uint32_t
mtk_detect_cpuclk_rt305x(bus_space_tag_t bst, bus_space_handle_t bsh)
{
uint32_t clk;
uint32_t val;
clk = bus_space_read_4(bst, bsh, SYSCTL_SYSCFG);
clk >>= RT305X_CPU_CLKSEL_OFF;
clk &= RT305X_CPU_CLKSEL_MSK;
val = bus_space_read_4(bst, bsh, SYSCTL_CHIPID0_3);
if (val == RT3350_CHIPID0_3)
return (MTK_CPU_CLK_320MHZ);
return ((clk == 0) ? MTK_CPU_CLK_320MHZ : MTK_CPU_CLK_384MHZ);
val = bus_space_read_4(bst, bsh, SYSCTL_SYSCFG);
val >>= RT305X_CPU_CLKSEL_OFF;
val &= RT305X_CPU_CLKSEL_MSK;
return ((val == 0) ? MTK_CPU_CLK_320MHZ : MTK_CPU_CLK_384MHZ);
}
static uint32_t
@ -265,10 +269,8 @@ mtk_soc_try_early_detect(void)
switch (mtk_soc_socid) {
case MTK_SOC_RT3050: /* fallthrough */
case MTK_SOC_RT3052:
mtk_soc_cpuclk = mtk_detect_cpuclk_rt305x(bst, bsh);
break;
case MTK_SOC_RT3350:
mtk_soc_cpuclk = MTK_CPU_CLK_320MHZ;
mtk_soc_cpuclk = mtk_detect_cpuclk_rt305x(bst, bsh);
break;
case MTK_SOC_RT3352:
mtk_soc_cpuclk = mtk_detect_cpuclk_rt3352(bst, bsh);

2
sys/mips/mediatek/mtk_sysctl.h
View File

@ -52,6 +52,8 @@
#define SYSCFG1_USB_HOST_MODE (1<<10)
#define RT3350_CHIPID0_3 0x33335452
extern uint32_t mtk_sysctl_get(uint32_t);
extern void mtk_sysctl_set(uint32_t, uint32_t);
extern void mtk_sysctl_clr_set(uint32_t, uint32_t, uint32_t);