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- Get proper maximum clock frequency for SDHCI v3.0 and higher

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This commit is contained in:
Oleksandr Tymoshenko 2012-11-30 02:35:13 +00:00
parent 3b37b3c221
commit 33aad34de6
2 changed files with 11 additions and 4 deletions
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14
sys/dev/sdhci/sdhci.c
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@ -96,6 +96,8 @@ static void sdhci_card_task(void *, int);
#define SDHCI_ASSERT_LOCKED(_slot) mtx_assert(&_slot->mtx, MA_OWNED);
#define SDHCI_ASSERT_UNLOCKED(_slot) mtx_assert(&_slot->mtx, MA_NOTOWNED);
#define SDHCI_DEFAULT_MAX_FREQ 50
static void
sdhci_getaddr(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
{
@ -516,12 +518,16 @@ sdhci_init_slot(device_t dev, struct sdhci_slot *slot, int num)
else
caps = RD4(slot, SDHCI_CAPABILITIES);
/* Calculate base clock frequency. */
slot->max_clk =
(caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
if (slot->version >= SDHCI_SPEC_300)
slot->max_clk = (caps & SDHCI_CLOCK_V3_BASE_MASK)
>> SDHCI_CLOCK_BASE_SHIFT;
else
slot->max_clk = (caps & SDHCI_CLOCK_BASE_MASK)
>> SDHCI_CLOCK_BASE_SHIFT;
if (slot->max_clk == 0) {
slot->max_clk = 50;
slot->max_clk = SDHCI_DEFAULT_MAX_FREQ;
device_printf(dev, "Hardware doesn't specify base clock "
"frequency.\n");
"frequency, using %dMHz as default.\n", SDHCI_DEFAULT_MAX_FREQ);
}
slot->max_clk *= 1000000;
/* Calculate timeout clock frequency. */

1
sys/dev/sdhci/sdhci.h
View File

@ -191,6 +191,7 @@
#define SDHCI_TIMEOUT_CLK_SHIFT 0
#define SDHCI_TIMEOUT_CLK_UNIT 0x00000080
#define SDHCI_CLOCK_BASE_MASK 0x00003F00
#define SDHCI_CLOCK_V3_BASE_MASK 0x0000FF00
#define SDHCI_CLOCK_BASE_SHIFT 8
#define SDHCI_MAX_BLOCK_MASK 0x00030000
#define SDHCI_MAX_BLOCK_SHIFT 16