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Allow fast instruction and data access mmu miss traps to be handled by

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user trap handlers.
This commit is contained in:
jake 2003-04-29 21:30:59 +00:00
parent e69967f534
commit 3633577d4c
3 changed files with 11 additions and 9 deletions
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12
sys/sparc64/include/trap.h
View File

@ -65,13 +65,13 @@
#define T_TRAP_INSTRUCTION_29 31
#define T_TRAP_INSTRUCTION_30 32
#define T_TRAP_INSTRUCTION_31 33
#define T_INSTRUCTION_MISS 34
#define T_DATA_MISS 35
#define T_INTERRUPT 34
#define T_PA_WATCHPOINT 35
#define T_VA_WATCHPOINT 36
#define T_CORRECTED_ECC_ERROR 37
#define T_INSTRUCTION_MISS 38
#define T_DATA_MISS 39
#define T_INTERRUPT 36
#define T_PA_WATCHPOINT 37
#define T_VA_WATCHPOINT 38
#define T_CORRECTED_ECC_ERROR 39
#define T_SPILL 40
#define T_FILL 41
#define T_FILL_RET 42

4
sys/sparc64/include/utrap.h
View File

@ -62,7 +62,9 @@
#define UT_TRAP_INSTRUCTION_29 31
#define UT_TRAP_INSTRUCTION_30 32
#define UT_TRAP_INSTRUCTION_31 33
#define UT_MAX 34
#define UT_INSTRUCTION_MISS 34
#define UT_DATA_MISS 35
#define UT_MAX 36
#define ST_SUNOS_SYSCALL 0
#define ST_BREAKPOINT 1

4
sys/sparc64/sparc64/exception.S
View File

@ -726,7 +726,7 @@ ENTRY(tl0_immu_miss_trap)
clr %o1
set trap, %o2
mov %g2, %o3
b %xcc, tl0_trap
ba %xcc, tl0_utrap
mov T_INSTRUCTION_MISS, %o0
END(tl0_immu_miss_trap)
@ -891,7 +891,7 @@ ENTRY(tl0_dmmu_miss_trap)
clr %o1
set trap, %o2
mov %g2, %o3
b %xcc, tl0_trap
ba %xcc, tl0_utrap
mov T_DATA_MISS, %o0
/*