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Improve the radar register config API.

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* Fix the "enabled" flag to actually reflect whether radar detection is
  enabled or not.
* Add flags for the relstep/relpwr checks.
This commit is contained in:
adrian 2012-02-14 20:05:28 +00:00
parent 5fed2daf28
commit 3713a7972e
2 changed files with 44 additions and 24 deletions
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3
sys/dev/ath/ath_hal/ah.h
View File

@ -733,10 +733,11 @@ typedef struct {
*/
int32_t pe_extchannel; /* Enable DFS on ext channel */
int32_t pe_enabled; /* Whether radar detection is enabled */
int32_t pe_enrelpwr;
int32_t pe_en_relstep_check;
} HAL_PHYERR_PARAM;
#define HAL_PHYERR_PARAM_NOVAL 65535
#define HAL_PHYERR_PARAM_ENABLE 0x8000 /* Enable/Disable if applicable */
/*
* DFS operating mode flags.

65
sys/dev/ath/ath_hal/ar5416/ar5416_misc.c
View File

@ -740,19 +740,12 @@ ar5416GetDfsThresh(struct ath_hal *ah, HAL_PHYERR_PARAM *pe)
pe->pe_prssi = MS(val, AR_PHY_RADAR_0_PRSSI);
pe->pe_inband = MS(val, AR_PHY_RADAR_0_INBAND);
/* RADAR_1 values */
val = OS_REG_READ(ah, AR_PHY_RADAR_1);
temp = val & AR_PHY_RADAR_1_RELPWR_ENA;
pe->pe_relpwr = MS(val, AR_PHY_RADAR_1_RELPWR_THRESH);
if (temp)
pe->pe_relpwr |= HAL_PHYERR_PARAM_ENABLE;
temp = val & AR_PHY_RADAR_1_RELSTEP_CHECK;
pe->pe_relstep = MS(val, AR_PHY_RADAR_1_RELSTEP_THRESH);
if (temp)
pe->pe_enabled = 1;
else
pe->pe_enabled = 0;
pe->pe_maxlen = MS(val, AR_PHY_RADAR_1_MAXLEN);
pe->pe_extchannel = !! (OS_REG_READ(ah, AR_PHY_RADAR_EXT) &
AR_PHY_RADAR_EXT_ENA);
@ -762,6 +755,12 @@ ar5416GetDfsThresh(struct ath_hal *ah, HAL_PHYERR_PARAM *pe)
AR_PHY_RADAR_1_BLOCK_CHECK);
pe->pe_enmaxrssi = !! (OS_REG_READ(ah, AR_PHY_RADAR_1) &
AR_PHY_RADAR_1_MAX_RRSSI);
pe->pe_enabled = !!
(OS_REG_READ(ah, AR_PHY_RADAR_0) & AR_PHY_RADAR_0_ENA);
pe->pe_enrelpwr = !! (OS_REG_READ(ah, AR_PHY_RADAR_1) &
AR_PHY_RADAR_1_RELPWR_ENA);
pe->pe_en_relstep_check = !! (OS_REG_READ(ah, AR_PHY_RADAR_1) &
AR_PHY_RADAR_1_RELSTEP_CHECK);
}
/*
@ -798,9 +797,15 @@ ar5416EnableDfs(struct ath_hal *ah, HAL_PHYERR_PARAM *pe)
/*Enable FFT data*/
val |= AR_PHY_RADAR_0_FFT_ENA;
OS_REG_WRITE(ah, AR_PHY_RADAR_0, val);
OS_REG_WRITE(ah, AR_PHY_RADAR_0, val | AR_PHY_RADAR_0_ENA);
/* Implicitly enable */
if (pe->pe_enabled == 1)
OS_REG_SET_BIT(ah, AR_PHY_RADAR_0, AR_PHY_RADAR_0_ENA);
else if (pe->pe_enabled == 0)
OS_REG_CLR_BIT(ah, AR_PHY_RADAR_0, AR_PHY_RADAR_0_ENA);
/* XXX is this around the correct way?! */
if (pe->pe_usefir128 == 1)
OS_REG_CLR_BIT(ah, AR_PHY_RADAR_1, AR_PHY_RADAR_1_USE_FIR128);
else if (pe->pe_usefir128 == 0)
@ -816,6 +821,33 @@ ar5416EnableDfs(struct ath_hal *ah, HAL_PHYERR_PARAM *pe)
else if (pe->pe_blockradar == 0)
OS_REG_CLR_BIT(ah, AR_PHY_RADAR_1, AR_PHY_RADAR_1_BLOCK_CHECK);
if (pe->pe_relstep != HAL_PHYERR_PARAM_NOVAL) {
val = OS_REG_READ(ah, AR_PHY_RADAR_1);
val &= ~AR_PHY_RADAR_1_RELSTEP_THRESH;
val |= SM(pe->pe_relstep, AR_PHY_RADAR_1_RELSTEP_THRESH);
OS_REG_WRITE(ah, AR_PHY_RADAR_1, val);
}
if (pe->pe_relpwr != HAL_PHYERR_PARAM_NOVAL) {
val = OS_REG_READ(ah, AR_PHY_RADAR_1);
val &= ~AR_PHY_RADAR_1_RELPWR_THRESH;
val |= SM(pe->pe_relpwr, AR_PHY_RADAR_1_RELPWR_THRESH);
OS_REG_WRITE(ah, AR_PHY_RADAR_1, val);
}
if (pe->pe_en_relstep_check == 1)
OS_REG_SET_BIT(ah, AR_PHY_RADAR_1,
AR_PHY_RADAR_1_RELSTEP_CHECK);
else if (pe->pe_en_relstep_check == 0)
OS_REG_CLR_BIT(ah, AR_PHY_RADAR_1,
AR_PHY_RADAR_1_RELSTEP_CHECK);
if (pe->pe_enrelpwr == 1)
OS_REG_SET_BIT(ah, AR_PHY_RADAR_1,
AR_PHY_RADAR_1_RELPWR_ENA);
else if (pe->pe_enrelpwr == 0)
OS_REG_CLR_BIT(ah, AR_PHY_RADAR_1,
AR_PHY_RADAR_1_RELPWR_ENA);
if (pe->pe_maxlen != HAL_PHYERR_PARAM_NOVAL) {
val = OS_REG_READ(ah, AR_PHY_RADAR_1);
val &= ~AR_PHY_RADAR_1_MAXLEN;
@ -832,19 +864,6 @@ ar5416EnableDfs(struct ath_hal *ah, HAL_PHYERR_PARAM *pe)
OS_REG_SET_BIT(ah, AR_PHY_RADAR_EXT, AR_PHY_RADAR_EXT_ENA);
else if (pe->pe_extchannel == 0)
OS_REG_CLR_BIT(ah, AR_PHY_RADAR_EXT, AR_PHY_RADAR_EXT_ENA);
if (pe->pe_relstep != HAL_PHYERR_PARAM_NOVAL) {
val = OS_REG_READ(ah, AR_PHY_RADAR_1);
val &= ~AR_PHY_RADAR_1_RELSTEP_THRESH;
val |= SM(pe->pe_relstep, AR_PHY_RADAR_1_RELSTEP_THRESH);
OS_REG_WRITE(ah, AR_PHY_RADAR_1, val);
}
if (pe->pe_relpwr != HAL_PHYERR_PARAM_NOVAL) {
val = OS_REG_READ(ah, AR_PHY_RADAR_1);
val &= ~AR_PHY_RADAR_1_RELPWR_THRESH;
val |= SM(pe->pe_relpwr, AR_PHY_RADAR_1_RELPWR_THRESH);
OS_REG_WRITE(ah, AR_PHY_RADAR_1, val);
}
}
/*