hwpstate: Add support for family 17h pstate info from MSRs
This information is normally available via acpi_perf, but in case it is not, add support for fetching the information via MSRs on AMD family 17h (Zen) processors. Zen uses a slightly different formula than previous generation AMD CPUs. This was inspired by, but does not fix, PR 221621. Reported by: Sean P. R. <seanpr AT swbell.net> Reviewed by: mjoras@ Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D12082
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@ -83,6 +83,10 @@ __FBSDID("$FreeBSD$");
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#define AMD_10H_11H_CUR_DID(msr) (((msr) >> 6) & 0x07)
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#define AMD_10H_11H_CUR_FID(msr) ((msr) & 0x3F)
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#define AMD_17H_CUR_VID(msr) (((msr) >> 14) & 0xFF)
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#define AMD_17H_CUR_DID(msr) (((msr) >> 8) & 0x3F)
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#define AMD_17H_CUR_FID(msr) ((msr) & 0xFF)
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#define HWPSTATE_DEBUG(dev, msg...) \
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do{ \
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if(hwpstate_verbose) \
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@ -427,6 +431,15 @@ hwpstate_get_info_from_msr(device_t dev)
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case 0x16:
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hwpstate_set[i].freq = (100 * (fid + 0x10)) >> did;
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break;
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case 0x17:
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did = AMD_17H_CUR_DID(msr);
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if (did == 0) {
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HWPSTATE_DEBUG(dev, "unexpected did: 0\n");
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did = 1;
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}
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fid = AMD_17H_CUR_FID(msr);
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hwpstate_set[i].freq = (200 * fid) / did;
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break;
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default:
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HWPSTATE_DEBUG(dev, "get_info_from_msr: AMD family"
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" 0x%02x CPUs are not supported yet\n", family);
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