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- Use the correct DMA tag/map pair for synchronize the FC scratch area.

Browse Source 
- Allocate coherent DMA memory for the request/response queue area and
  and the FC scratch area.

These changes allow isp(4) to work properly on sparc64 with usage of the
IOMMU streaming buffers enabled.

Approved by:	mjacob
MFC after:	2 weeks
This commit is contained in:
Marius Strobl 2011-02-14 21:50:51 +00:00
parent b986265911
commit 37bb79f173
7 changed files with 61 additions and 49 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

42
sys/dev/isp/isp.c
View File

@ -777,7 +777,7 @@ isp_reset(ispsoftc_t *isp, int do_load_defaults)
ISP_IOXPUT_32(isp, ptr[wi++], &cp[i]);
wl--;
}
MEMORYBARRIER(isp, SYNC_REQUEST, 0, ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp)));
MEMORYBARRIER(isp, SYNC_REQUEST, 0, ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp)), -1);
ISP_MEMZERO(&mbs, sizeof (mbs));
if (la < 0x10000 && nw < 0x10000) {
mbs.param[0] = MBOX_LOAD_RISC_RAM_2100;
@ -846,7 +846,7 @@ isp_reset(ispsoftc_t *isp, int do_load_defaults)
ISP_IOXPUT_16(isp, ptr[wi++], &cp[i]);
wl--;
}
MEMORYBARRIER(isp, SYNC_REQUEST, 0, ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp)));
MEMORYBARRIER(isp, SYNC_REQUEST, 0, ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp)), -1);
ISP_MEMZERO(&mbs, sizeof (mbs));
if (la < 0x10000) {
mbs.param[0] = MBOX_LOAD_RISC_RAM_2100;
@ -1716,7 +1716,7 @@ isp_fibre_init(ispsoftc_t *isp)
isp_prt(isp, ISP_LOGDEBUG0, "INIT F/W from %p (%08x%08x)",
fcp->isp_scratch, (uint32_t) ((uint64_t)fcp->isp_scdma >> 32),
(uint32_t) fcp->isp_scdma);
MEMORYBARRIER(isp, SYNC_SFORDEV, 0, sizeof (*icbp));
MEMORYBARRIER(isp, SYNC_SFORDEV, 0, sizeof (*icbp), 0);
isp_mboxcmd(isp, &mbs);
FC_SCRATCH_RELEASE(isp, 0);
if (mbs.param[0] != MBOX_COMMAND_COMPLETE) {
@ -2008,7 +2008,7 @@ isp_fibre_init_2400(ispsoftc_t *isp)
mbs.param[6] = DMA_WD3(fcp->isp_scdma);
mbs.param[7] = DMA_WD2(fcp->isp_scdma);
isp_prt(isp, ISP_LOGDEBUG0, "INIT F/W from %04x%04x%04x%04x", DMA_WD3(fcp->isp_scdma), DMA_WD2(fcp->isp_scdma), DMA_WD1(fcp->isp_scdma), DMA_WD0(fcp->isp_scdma));
MEMORYBARRIER(isp, SYNC_SFORDEV, 0, sizeof (*icbp));
MEMORYBARRIER(isp, SYNC_SFORDEV, 0, sizeof (*icbp), 0);
isp_mboxcmd(isp, &mbs);
FC_SCRATCH_RELEASE(isp, 0);
@ -2125,13 +2125,13 @@ isp_plogx(ispsoftc_t *isp, int chan, uint16_t handle, uint32_t portid, int flags
mbs.param[3] = DMA_WD0(fcp->isp_scdma);
mbs.param[6] = DMA_WD3(fcp->isp_scdma);
mbs.param[7] = DMA_WD2(fcp->isp_scdma);
MEMORYBARRIER(isp, SYNC_SFORDEV, 0, QENTRY_LEN);
MEMORYBARRIER(isp, SYNC_SFORDEV, 0, QENTRY_LEN, chan);
isp_mboxcmd(isp, &mbs);
if (mbs.param[0] != MBOX_COMMAND_COMPLETE) {
rval = mbs.param[0];
goto out;
}
MEMORYBARRIER(isp, SYNC_SFORCPU, QENTRY_LEN, QENTRY_LEN);
MEMORYBARRIER(isp, SYNC_SFORCPU, QENTRY_LEN, QENTRY_LEN, chan);
scp += QENTRY_LEN;
isp_get_plogx(isp, (isp_plogx_t *) scp, plp);
if (isp->isp_dblev & ISP_LOGDEBUG1) {
@ -2324,7 +2324,7 @@ isp_getpdb(ispsoftc_t *isp, int chan, uint16_t id, isp_pdb_t *pdb, int dolock)
return (-1);
}
}
MEMORYBARRIER(isp, SYNC_SFORDEV, 0, sizeof (un));
MEMORYBARRIER(isp, SYNC_SFORDEV, 0, sizeof (un), chan);
isp_mboxcmd(isp, &mbs);
if (mbs.param[0] != MBOX_COMMAND_COMPLETE) {
if (dolock) {
@ -3215,7 +3215,7 @@ isp_gid_ft_sns(ispsoftc_t *isp, int chan)
rq->snscb_fc4_type = FC4_SCSI;
isp_put_gid_ft_request(isp, rq, fcp->isp_scratch);
MEMORYBARRIER(isp, SYNC_SFORDEV, 0, SNS_GID_FT_REQ_SIZE);
MEMORYBARRIER(isp, SYNC_SFORDEV, 0, SNS_GID_FT_REQ_SIZE, chan);
MBSINIT(&mbs, MBOX_SEND_SNS, MBLOGALL, 10000000);
mbs.param[0] = MBOX_SEND_SNS;
@ -3310,12 +3310,12 @@ isp_gid_ft_ct_passthru(ispsoftc_t *isp, int chan)
mbs.param[3] = DMA_WD0(fcp->isp_scdma + CTXOFF);
mbs.param[6] = DMA_WD3(fcp->isp_scdma + CTXOFF);
mbs.param[7] = DMA_WD2(fcp->isp_scdma + CTXOFF);
MEMORYBARRIER(isp, SYNC_SFORDEV, XTXOFF, 2 * QENTRY_LEN);
MEMORYBARRIER(isp, SYNC_SFORDEV, XTXOFF, 2 * QENTRY_LEN, chan);
isp_mboxcmd(isp, &mbs);
if (mbs.param[0] != MBOX_COMMAND_COMPLETE) {
return (-1);
}
MEMORYBARRIER(isp, SYNC_SFORCPU, ZTXOFF, QENTRY_LEN);
MEMORYBARRIER(isp, SYNC_SFORCPU, ZTXOFF, QENTRY_LEN, chan);
pt = &un.plocal;
isp_get_ct_pt(isp, (isp_ct_pt_t *) &scp[ZTXOFF], pt);
if (isp->isp_dblev & ISP_LOGDEBUG1) {
@ -3328,7 +3328,7 @@ isp_gid_ft_ct_passthru(ispsoftc_t *isp, int chan)
chan, pt->ctp_status);
return (-1);
}
MEMORYBARRIER(isp, SYNC_SFORCPU, IGPOFF, GIDLEN + 16);
MEMORYBARRIER(isp, SYNC_SFORCPU, IGPOFF, GIDLEN + 16, chan);
if (isp->isp_dblev & ISP_LOGDEBUG1) {
isp_print_bytes(isp, "CT response", GIDLEN+16, &scp[IGPOFF]);
}
@ -3414,7 +3414,7 @@ isp_scan_fabric(ispsoftc_t *isp, int chan)
return (0);
}
MEMORYBARRIER(isp, SYNC_SFORCPU, IGPOFF, GIDLEN);
MEMORYBARRIER(isp, SYNC_SFORCPU, IGPOFF, GIDLEN, chan);
rs0 = (sns_gid_ft_rsp_t *) ((uint8_t *)fcp->isp_scratch+IGPOFF);
rs1 = (sns_gid_ft_rsp_t *) ((uint8_t *)fcp->isp_scratch+OGPOFF);
isp_get_gid_ft_response(isp, rs0, rs1, NGENT);
@ -4008,7 +4008,7 @@ isp_register_fc4_type(ispsoftc_t *isp, int chan)
mbs.param[3] = DMA_WD0(fcp->isp_scdma);
mbs.param[6] = DMA_WD3(fcp->isp_scdma);
mbs.param[7] = DMA_WD2(fcp->isp_scdma);
MEMORYBARRIER(isp, SYNC_SFORDEV, 0, SNS_RFT_ID_REQ_SIZE);
MEMORYBARRIER(isp, SYNC_SFORDEV, 0, SNS_RFT_ID_REQ_SIZE, chan);
isp_mboxcmd(isp, &mbs);
FC_SCRATCH_RELEASE(isp, chan);
if (mbs.param[0] == MBOX_COMMAND_COMPLETE) {
@ -4094,13 +4094,13 @@ isp_register_fc4_type_24xx(ispsoftc_t *isp, int chan)
mbs.param[3] = DMA_WD0(fcp->isp_scdma + CTXOFF);
mbs.param[6] = DMA_WD3(fcp->isp_scdma + CTXOFF);
mbs.param[7] = DMA_WD2(fcp->isp_scdma + CTXOFF);
MEMORYBARRIER(isp, SYNC_SFORDEV, XTXOFF, 2 * QENTRY_LEN);
MEMORYBARRIER(isp, SYNC_SFORDEV, XTXOFF, 2 * QENTRY_LEN, chan);
isp_mboxcmd(isp, &mbs);
if (mbs.param[0] != MBOX_COMMAND_COMPLETE) {
FC_SCRATCH_RELEASE(isp, chan);
return (-1);
}
MEMORYBARRIER(isp, SYNC_SFORCPU, ZTXOFF, QENTRY_LEN);
MEMORYBARRIER(isp, SYNC_SFORCPU, ZTXOFF, QENTRY_LEN, chan);
pt = &un.plocal;
isp_get_ct_pt(isp, (isp_ct_pt_t *) &scp[ZTXOFF], pt);
if (isp->isp_dblev & ISP_LOGDEBUG1) {
@ -4552,7 +4552,7 @@ isp_control(ispsoftc_t *isp, ispctl_t ctl, ...)
break;
}
isp_put_24xx_tmf(isp, tmf, fcp->isp_scratch);
MEMORYBARRIER(isp, SYNC_SFORDEV, 0, QENTRY_LEN);
MEMORYBARRIER(isp, SYNC_SFORDEV, 0, QENTRY_LEN, chan);
fcp->sendmarker = 1;
isp_mboxcmd(isp, &mbs);
if (mbs.param[0] != MBOX_COMMAND_COMPLETE) {
@ -4560,7 +4560,7 @@ isp_control(ispsoftc_t *isp, ispctl_t ctl, ...)
break;
}
MEMORYBARRIER(isp, SYNC_SFORCPU, QENTRY_LEN,
QENTRY_LEN);
QENTRY_LEN, chan);
sp = (isp24xx_statusreq_t *) local;
isp_get_24xx_response(isp,
&((isp24xx_statusreq_t *)fcp->isp_scratch)[1], sp);
@ -4656,14 +4656,14 @@ isp_control(ispsoftc_t *isp, ispctl_t ctl, ...)
ab2 = (isp24xx_abrt_t *)
&((uint8_t *)fcp->isp_scratch)[QENTRY_LEN];
ab2->abrt_nphdl = 0xdeaf;
MEMORYBARRIER(isp, SYNC_SFORDEV, 0, 2 * QENTRY_LEN);
MEMORYBARRIER(isp, SYNC_SFORDEV, 0, 2 * QENTRY_LEN, chan);
isp_mboxcmd(isp, &mbs);
if (mbs.param[0] != MBOX_COMMAND_COMPLETE) {
FC_SCRATCH_RELEASE(isp, chan);
break;
}
MEMORYBARRIER(isp, SYNC_SFORCPU, QENTRY_LEN,
QENTRY_LEN);
QENTRY_LEN, chan);
isp_get_24xx_abrt(isp, ab2, ab);
FC_SCRATCH_RELEASE(isp, chan);
if (ab->abrt_nphdl == ISP24XX_ABRT_OKAY) {
@ -4936,7 +4936,7 @@ isp_intr(ispsoftc_t *isp, uint32_t isr, uint16_t sema, uint16_t mbox)
void *addr;
oop = optr;
MEMORYBARRIER(isp, SYNC_ATIOQ, oop, QENTRY_LEN);
MEMORYBARRIER(isp, SYNC_ATIOQ, oop, QENTRY_LEN, -1);
addr = ISP_QUEUE_ENTRY(isp->isp_atioq, oop);
isp_get_hdr(isp, addr, (isphdr_t *)qe);
hp = (isphdr_t *)qe;
@ -5053,7 +5053,7 @@ isp_intr(ispsoftc_t *isp, uint32_t isr, uint16_t sema, uint16_t mbox)
/*
* Synchronize our view of this response queue entry.
*/
MEMORYBARRIER(isp, SYNC_RESULT, oop, QENTRY_LEN);
MEMORYBARRIER(isp, SYNC_RESULT, oop, QENTRY_LEN, -1);
isp_get_hdr(isp, hp, &sp->req_header);
etype = sp->req_header.rqs_entry_type;

4
sys/dev/isp/isp_freebsd.c
View File

@ -604,11 +604,11 @@ ispioctl(struct cdev *dev, u_long c, caddr_t addr, int flags, struct thread *td)
break;
}
isp_put_24xx_tmf(isp, tmf, fcp->isp_scratch);
MEMORYBARRIER(isp, SYNC_SFORDEV, 0, QENTRY_LEN);
MEMORYBARRIER(isp, SYNC_SFORDEV, 0, QENTRY_LEN, chan);
sp = (isp24xx_statusreq_t *) local;
sp->req_completion_status = 1;
retval = isp_control(isp, ISPCTL_RUN_MBOXCMD, &mbs);
MEMORYBARRIER(isp, SYNC_SFORCPU, QENTRY_LEN, QENTRY_LEN);
MEMORYBARRIER(isp, SYNC_SFORCPU, QENTRY_LEN, QENTRY_LEN, chan);
isp_get_24xx_response(isp, &((isp24xx_statusreq_t *)fcp->isp_scratch)[1], sp);
FC_SCRATCH_RELEASE(isp, chan);
if (retval || sp->req_completion_status != 0) {

14
sys/dev/isp/isp_freebsd.h
View File

@ -338,15 +338,27 @@ struct isposinfo {
#define MAXISPREQUEST(isp) ((IS_FC(isp) || IS_ULTRA2(isp))? 1024 : 256)
#define MEMORYBARRIER(isp, type, offset, size) \
#define MEMORYBARRIER(isp, type, offset, size, chan) \
switch (type) { \
case SYNC_SFORDEV: \
{ \
struct isp_fc *fc = ISP_FC_PC(isp, chan); \
bus_dmamap_sync(fc->tdmat, fc->tdmap, \
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); \
break; \
} \
case SYNC_REQUEST: \
bus_dmamap_sync(isp->isp_osinfo.cdmat, \
isp->isp_osinfo.cdmap, \
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); \
break; \
case SYNC_SFORCPU: \
{ \
struct isp_fc *fc = ISP_FC_PC(isp, chan); \
bus_dmamap_sync(fc->tdmat, fc->tdmap, \
BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); \
break; \
} \
case SYNC_RESULT: \
bus_dmamap_sync(isp->isp_osinfo.cdmat, \
isp->isp_osinfo.cdmap, \

4
sys/dev/isp/isp_library.c
View File

@ -591,13 +591,13 @@ isp_fc_change_role(ispsoftc_t *isp, int chan, int new_role)
mbs.param[3] = DMA_WD0(fcp->isp_scdma);
mbs.param[6] = DMA_WD3(fcp->isp_scdma);
mbs.param[7] = DMA_WD2(fcp->isp_scdma);
MEMORYBARRIER(isp, SYNC_SFORDEV, 0, 2 * QENTRY_LEN);
MEMORYBARRIER(isp, SYNC_SFORDEV, 0, 2 * QENTRY_LEN, chan);
isp_control(isp, ISPCTL_RUN_MBOXCMD, &mbs);
if (mbs.param[0] != MBOX_COMMAND_COMPLETE) {
FC_SCRATCH_RELEASE(isp, chan);
return (EIO);
}
MEMORYBARRIER(isp, SYNC_SFORCPU, QENTRY_LEN, QENTRY_LEN);
MEMORYBARRIER(isp, SYNC_SFORCPU, QENTRY_LEN, QENTRY_LEN, chan);
isp_get_vp_modify(isp, (vp_modify_t *)&scp[QENTRY_LEN], vp);
#ifdef ISP_TARGET_MODE

32
sys/dev/isp/isp_pci.c
View File

@ -1180,12 +1180,12 @@ isp_pci_rd_reg(ispsoftc_t *isp, int regoff)
*/
oldconf = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oldconf | BIU_PCI_CONF1_SXP);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
}
rv = BXR2(isp, IspVirt2Off(isp, regoff));
if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oldconf);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
}
return (rv);
}
@ -1202,13 +1202,13 @@ isp_pci_wr_reg(ispsoftc_t *isp, int regoff, uint32_t val)
oldconf = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
BXW2(isp, IspVirt2Off(isp, BIU_CONF1),
oldconf | BIU_PCI_CONF1_SXP);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
}
BXW2(isp, IspVirt2Off(isp, regoff), val);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 2);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 2, -1);
if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oldconf);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
}
}
@ -1231,17 +1231,17 @@ isp_pci_rd_reg_1080(ispsoftc_t *isp, int regoff)
else
tc |= BIU_PCI1080_CONF1_SXP0;
BXW2(isp, IspVirt2Off(isp, BIU_CONF1), tc);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
} else if ((regoff & _BLK_REG_MASK) == DMA_BLOCK) {
oc = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
BXW2(isp, IspVirt2Off(isp, BIU_CONF1),
oc | BIU_PCI1080_CONF1_DMA);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
}
rv = BXR2(isp, IspVirt2Off(isp, regoff));
if (oc) {
BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oc);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
}
return (rv);
}
@ -1264,18 +1264,18 @@ isp_pci_wr_reg_1080(ispsoftc_t *isp, int regoff, uint32_t val)
else
tc |= BIU_PCI1080_CONF1_SXP0;
BXW2(isp, IspVirt2Off(isp, BIU_CONF1), tc);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
} else if ((regoff & _BLK_REG_MASK) == DMA_BLOCK) {
oc = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
BXW2(isp, IspVirt2Off(isp, BIU_CONF1),
oc | BIU_PCI1080_CONF1_DMA);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
}
BXW2(isp, IspVirt2Off(isp, regoff), val);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 2);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 2, -1);
if (oc) {
BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oc);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2, -1);
}
}
@ -1350,7 +1350,7 @@ isp_pci_wr_reg_2400(ispsoftc_t *isp, int regoff, uint32_t val)
break;
case MBOX_BLOCK:
BXW2(isp, IspVirt2Off(isp, regoff), val);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 2);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 2, -1);
return;
case SXP_BLOCK:
isp_prt(isp, ISP_LOGWARN, "SXP_BLOCK write at 0x%x", regoff);
@ -1386,7 +1386,7 @@ isp_pci_wr_reg_2400(ispsoftc_t *isp, int regoff, uint32_t val)
case BIU2400_GPIOE:
case BIU2400_HSEMA:
BXW4(isp, IspVirt2Off(isp, regoff), val);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 4);
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 4, -1);
break;
default:
isp_prt(isp, ISP_LOGERR,
@ -1574,7 +1574,7 @@ isp_pci_mbxdma(ispsoftc_t *isp)
return (1);
}
if (bus_dmamem_alloc(isp->isp_osinfo.cdmat, (void **)&base, BUS_DMA_NOWAIT, &isp->isp_osinfo.cdmap) != 0) {
if (bus_dmamem_alloc(isp->isp_osinfo.cdmat, (void **)&base, BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &isp->isp_osinfo.cdmap) != 0) {
isp_prt(isp, ISP_LOGERR, "cannot allocate %d bytes of CCB memory", len);
bus_dma_tag_destroy(isp->isp_osinfo.cdmat);
free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
@ -1603,7 +1603,7 @@ isp_pci_mbxdma(ispsoftc_t *isp)
if (isp_dma_tag_create(isp->isp_osinfo.dmat, 64, slim, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, ISP_FC_SCRLEN, 1, slim, 0, &fc->tdmat)) {
goto bad;
}
if (bus_dmamem_alloc(fc->tdmat, (void **)&base, BUS_DMA_NOWAIT, &fc->tdmap) != 0) {
if (bus_dmamem_alloc(fc->tdmat, (void **)&base, BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &fc->tdmap) != 0) {
bus_dma_tag_destroy(fc->tdmat);
goto bad;
}

4
sys/dev/isp/isp_sbus.c
View File

@ -401,7 +401,7 @@ isp_sbus_wr_reg(ispsoftc_t *isp, int regoff, uint32_t val)
isp_prt(isp, ISP_LOGDEBUG3,
"isp_sbus_wr_reg(off %x) = %x", regoff, val);
bus_space_write_2(isp->isp_bus_tag, isp->isp_bus_handle, offset, val);
MEMORYBARRIER(isp, SYNC_REG, offset, 2);
MEMORYBARRIER(isp, SYNC_REG, offset, 2, -1);
}
struct imush {
@ -496,7 +496,7 @@ isp_sbus_mbxdma(ispsoftc_t *isp)
return (1);
}
if (bus_dmamem_alloc(isp->isp_osinfo.cdmat, (void **)&base, BUS_DMA_NOWAIT,
if (bus_dmamem_alloc(isp->isp_osinfo.cdmat, (void **)&base, BUS_DMA_NOWAIT | BUS_DMA_COHERENT,
&isp->isp_osinfo.cdmap) != 0) {
isp_prt(isp, ISP_LOGERR,
"cannot allocate %d bytes of CCB memory", len);

10
sys/dev/isp/ispvar.h
View File

@ -154,13 +154,13 @@ struct ispmdvec {
#define ISP_QAVAIL(isp) \
ISP_QFREE(isp->isp_reqidx, isp->isp_reqodx, RQUEST_QUEUE_LEN(isp))
#define ISP_ADD_REQUEST(isp, nxti) \
MEMORYBARRIER(isp, SYNC_REQUEST, isp->isp_reqidx, QENTRY_LEN); \
ISP_WRITE(isp, isp->isp_rqstinrp, nxti); \
#define ISP_ADD_REQUEST(isp, nxti) \
MEMORYBARRIER(isp, SYNC_REQUEST, isp->isp_reqidx, QENTRY_LEN, -1); \
ISP_WRITE(isp, isp->isp_rqstinrp, nxti); \
isp->isp_reqidx = nxti
#define ISP_SYNC_REQUEST(isp) \
MEMORYBARRIER(isp, SYNC_REQUEST, isp->isp_reqidx, QENTRY_LEN); \
MEMORYBARRIER(isp, SYNC_REQUEST, isp->isp_reqidx, QENTRY_LEN, -1); \
isp->isp_reqidx = ISP_NXT_QENTRY(isp->isp_reqidx, RQUEST_QUEUE_LEN(isp)); \
ISP_WRITE(isp, isp->isp_rqstinrp, isp->isp_reqidx)
@ -1010,7 +1010,7 @@ void isp_async(ispsoftc_t *, ispasync_t, ...);
* MAXISPREQUEST(ispsoftc_t *) maximum request queue size
* for this particular board type
*
* MEMORYBARRIER(ispsoftc_t *, barrier_type, offset, size)
* MEMORYBARRIER(ispsoftc_t *, barrier_type, offset, size, chan)
*
* Function/Macro the provides memory synchronization on
* various objects so that the ISP's and the system's view