diff --git a/sys/mips/include/cpu.h b/sys/mips/include/cpu.h
index f8445f35b782..2691cf2c88e2 100644
--- a/sys/mips/include/cpu.h
+++ b/sys/mips/include/cpu.h
@@ -51,11 +51,6 @@
 
 /* BEGIN: these are going away */
 
-#define	SR_KSU_MASK		0x00000018
-#define	SR_KSU_USER		0x00000010
-#define	SR_KSU_SUPER		0x00000008
-#define	SR_KSU_KERNEL		0x00000000
-
 #define	soft_int_mask(softintr)	(1 << ((softintr) + 8))
 #define	hard_int_mask(hardintr)	(1 << ((hardintr) + 10))
 
@@ -69,7 +64,7 @@
 #include <machine/cpufunc.h>
 #include <machine/frame.h>
 
-#define	TRAPF_USERMODE(framep)  (((framep)->sr & SR_KSU_USER) != 0)
+#define	TRAPF_USERMODE(framep)  (((framep)->sr & MIPS_SR_KSU_USER) != 0)
 #define	TRAPF_PC(framep)	((framep)->pc)
 #define	cpu_getstack(td)	((td)->td_frame->sp)
 #define	cpu_setstack(td, nsp)	((td)->td_frame->sp = (nsp))
diff --git a/sys/mips/mips/exception.S b/sys/mips/mips/exception.S
index f02ac7491418..d6a1411f5860 100644
--- a/sys/mips/mips/exception.S
+++ b/sys/mips/mips/exception.S
@@ -162,7 +162,7 @@ VECTOR(MipsException, unknown)
 	.set	noat
 	mfc0	k0, MIPS_COP_0_STATUS		# Get the status register
 	mfc0	k1, MIPS_COP_0_CAUSE		# Get the cause register value.
-	and	k0, k0, SR_KSU_USER		# test for user mode
+	and	k0, k0, MIPS_SR_KSU_USER	# test for user mode
 						# sneaky but the bits are
 						# with us........
 	sll	k0, k0, 3			# shift user bit for cause index
@@ -193,7 +193,7 @@ SlowFault:
 	.set	noat
 	mfc0	k0, MIPS_COP_0_STATUS
 	nop
-	and	k0, k0, SR_KSU_USER
+	and	k0, k0, MIPS_SR_KSU_USER
 	bne	k0, zero, _C_LABEL(MipsUserGenException)
 	nop
 	.set	at
@@ -224,7 +224,7 @@ SlowFault:
 	mfc0    a0, MIPS_COP_0_STATUS   ;\
 	li      a2, (MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX) ; \
 	or      a0, a0, a2	        ; \
-	li      a2, ~(MIPS_SR_INT_IE | MIPS_SR_EXL | SR_KSU_USER)   ; \
+	li      a2, ~(MIPS_SR_INT_IE | MIPS_SR_EXL | MIPS_SR_KSU_USER)   ; \
 	and     a0, a0, a2              ; \
         mtc0    a0, MIPS_COP_0_STATUS   ; \
 	ITLBNOPFIX
@@ -233,14 +233,14 @@ SlowFault:
 	mfc0    a0, MIPS_COP_0_STATUS   ;\
 	li      a2, (MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_COP_2_BIT) ; \
 	or      a0, a0, a2	        ; \
-	li      a2, ~(MIPS_SR_INT_IE | MIPS_SR_EXL | SR_KSU_USER)   ; \
+	li      a2, ~(MIPS_SR_INT_IE | MIPS_SR_EXL | MIPS_SR_KSU_USER)   ; \
 	and     a0, a0, a2              ; \
         mtc0    a0, MIPS_COP_0_STATUS   ; \
 	ITLBNOPFIX
 #else
 #define CLEAR_STATUS \
 	mfc0    a0, MIPS_COP_0_STATUS   ;\
-	li      a2, ~(MIPS_SR_INT_IE | MIPS_SR_EXL | SR_KSU_USER)   ; \
+	li      a2, ~(MIPS_SR_INT_IE | MIPS_SR_EXL | MIPS_SR_KSU_USER)   ; \
 	and     a0, a0, a2              ; \
 	mtc0	a0, MIPS_COP_0_STATUS   ; \
 	ITLBNOPFIX
@@ -929,7 +929,7 @@ tlb_insert_random:
 	 * Branch to the comprehensive exception processing.
 	 */
 	mfc0	k1, MIPS_COP_0_STATUS
-	andi	k1, k1, SR_KSU_USER
+	andi	k1, k1, MIPS_SR_KSU_USER
 	bnez	k1, _C_LABEL(MipsUserGenException)
 	nop
 
diff --git a/sys/mips/mips/mpboot.S b/sys/mips/mips/mpboot.S
index 0c34fe2d10fa..7b73c3f1bf0a 100644
--- a/sys/mips/mips/mpboot.S
+++ b/sys/mips/mips/mpboot.S
@@ -42,7 +42,7 @@
 	mfc0    a0, MIPS_COP_0_STATUS   ;\
 	li      a2, (MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX) ; \
 	or      a0, a0, a2	        ; \
-	li      a2, ~(MIPS_SR_INT_IE | MIPS_SR_EXL | SR_KSU_USER | MIPS_SR_BEV) ; \
+	li      a2, ~(MIPS_SR_INT_IE | MIPS_SR_EXL | MIPS_SR_KSU_USER | MIPS_SR_BEV) ; \
 	and     a0, a0, a2              ; \
         mtc0    a0, MIPS_COP_0_STATUS
 #elif defined(__mips_n64)