Centralize initialization of pcpu, and set curthread early...

sys/mips/adm5120/adm5120_machdep.c

@@ -154,6 +154,9 @@ platform_start(__register_t a0 __unused, __register_t a1 __unused,
 	kernend = round_page((vm_offset_t)&end);
 	memset(&edata, 0, kernend - (vm_offset_t)(&edata));
 
+	/* Initialize pcpu stuff */
+	mips_pcpu_init();
+
 	cninit();
 	mips_init();
 	mips_timer_init_params(platform_counter_freq, 0);

sys/mips/alchemy/alchemy_machdep.c

@@ -154,6 +154,9 @@ platform_start(__register_t a0 __unused, __register_t a1 __unused,
 	kernend = round_page((vm_offset_t)&end);
 	memset(&edata, 0, kernend - (vm_offset_t)(&edata));
 
+	/* Initialize pcpu stuff */
+	mips_pcpu_init();
+
 	cninit();
 	mips_init();
 	/* Set counter_freq for tick_init_params() */

sys/mips/atheros/ar71xx_machdep.c

@@ -152,6 +152,9 @@ platform_start(__register_t a0 __unused, __register_t a1 __unused,
 	kernend = round_page((vm_offset_t)&end);
 	memset(&edata, 0, kernend - (vm_offset_t)(&edata));
 
+	/* Initialize pcpu stuff */
+	mips_pcpu_init();
+
 	argc = a0;
 	argv = (char**)a1;
 	envp = (char**)a2;

sys/mips/idt/idt_machdep.c

@@ -137,6 +137,9 @@ platform_start(__register_t a0, __register_t a1,
 	kernend = round_page((vm_offset_t)&end);
 	memset(&edata, 0, kernend - (vm_offset_t)(&edata));
 
+	/* Initialize pcpu stuff */
+	mips_pcpu_init();
+
 	/*
 	 * Looking for mem=XXM argument
 	 */

sys/mips/mips/machdep.c

@@ -252,6 +252,21 @@ SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, CTLFLAG_RW,
     &wall_cmos_clock, 0, "Wall CMOS clock assumed");
 #endif	/* PORT_TO_JMIPS */
 
+/*
+ * Initialize per cpu data structures, include curthread.
+ */
+void
+mips_pcpu_init()
+{
+	/* Initialize pcpu info of cpu-zero */
+#ifdef SMP
+	pcpu_init(&__pcpu[0], 0, sizeof(struct pcpu));
+#else
+	pcpu_init(pcpup, 0, sizeof(struct pcpu));
+#endif
+	PCPU_SET(curthread, &thread0);
+}
+
 /*
  * Initialize mips and configure to run kernel
  */
@@ -275,24 +290,15 @@ mips_proc0_init(void)
 	    (thread0.td_kstack_pages - 1) * PAGE_SIZE) - 1;
 	thread0.td_frame = &thread0.td_pcb->pcb_regs;
 
-	/* Initialize pcpu info of cpu-zero */
-#ifdef SMP
-	pcpu_init(&__pcpu[0], 0, sizeof(struct pcpu));
-#else
-	pcpu_init(pcpup, 0, sizeof(struct pcpu));
-#endif
-
 	/* Steal memory for the dynamic per-cpu area. */
 	dpcpu_init((void *)pmap_steal_memory(DPCPU_SIZE), 0);
 
+	PCPU_SET(curpcb, thread0.td_pcb);
 	/*
 	 * There is no need to initialize md_upte array for thread0 as it's
 	 * located in .bss section and should be explicitly zeroed during 
 	 * kernel initialization.
 	 */
-
-	PCPU_SET(curthread, &thread0);
-	PCPU_SET(curpcb, thread0.td_pcb);
 }
 
 void

sys/mips/octeon1/octeon_machdep.c

@@ -652,6 +652,9 @@ platform_start(__register_t a0, __register_t a1, __register_t a2 __unused,
 	kernend = round_page((vm_offset_t)&end);
 	memset(&edata, 0, kernend - (vm_offset_t)(&edata));
 
+	/* Initialize pcpu stuff */
+	mips_pcpu_init();
+
 	octeon_boot_params_init(a3);
 	/* XXX octeon boot decriptor has args in it... */
         octeon_ciu_reset();

sys/mips/rmi/xlr_machdep.c

@@ -385,7 +385,10 @@ platform_start(__register_t a0 __unused,
 	void (*wakeup) (void *, void *, unsigned int);
 
 #endif
+	/* XXX no zeroing of BSS? */
 
+	/* Initialize pcpu stuff */
+	mips_pcpu_init();
 
 	/* XXX FIXME the code below is not 64 bit clean */
 	/* Save boot loader and other stuff from scratch regs */

sys/mips/sentry5/s5_machdep.c

@@ -188,6 +188,9 @@ platform_start(__register_t a0, __register_t a1, __register_t a2,
 	kernend = round_page((vm_offset_t)&end);
 	memset(&edata, 0, kernend - (vm_offset_t)(&edata));
 
+	/* Initialize pcpu stuff */
+	mips_pcpu_init();
+
 #ifdef CFE
 	/*
 	 * Initialize CFE firmware trampolines before

sys/mips/sibyte/sb_machdep.c

@@ -240,6 +240,9 @@ platform_start(__register_t a0, __register_t a1, __register_t a2,
 	memset(&edata, 0, (vm_offset_t)&end - (vm_offset_t)&edata);
 	kernend = round_page((vm_offset_t)&end);
 
+	/* Initialize pcpu stuff */
+	mips_pcpu_init();
+
 #ifdef CFE
 	/*
 	 * Initialize CFE firmware trampolines before