cxgbe(4): Update firmwares from version 1.16.12.0 to 1.16.22.0.

Obtained from:	Chelsio Communications
MFC after:	3 days
Sponsored by:	Chelsio Communications
This commit is contained in:
Navdeep Parhar 2016-12-06 12:43:07 +00:00
parent 00e61f254c
commit 3cbaf64f2e
15 changed files with 29304 additions and 29155 deletions

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@ -1381,7 +1381,7 @@ t4fw.fwo optional cxgbe \
no-implicit-rule \
clean "t4fw.fwo"
t4fw.fw optional cxgbe \
dependency "$S/dev/cxgbe/firmware/t4fw-1.16.12.0.bin.uu" \
dependency "$S/dev/cxgbe/firmware/t4fw-1.16.22.0.bin.uu" \
compile-with "${NORMAL_FW}" \
no-obj no-implicit-rule \
clean "t4fw.fw"
@ -1405,7 +1405,7 @@ t5fw.fwo optional cxgbe \
no-implicit-rule \
clean "t5fw.fwo"
t5fw.fw optional cxgbe \
dependency "$S/dev/cxgbe/firmware/t5fw-1.16.12.0.bin.uu" \
dependency "$S/dev/cxgbe/firmware/t5fw-1.16.22.0.bin.uu" \
compile-with "${NORMAL_FW}" \
no-obj no-implicit-rule \
clean "t5fw.fw"
@ -1429,7 +1429,7 @@ t6fw.fwo optional cxgbe \
no-implicit-rule \
clean "t6fw.fwo"
t6fw.fw optional cxgbe \
dependency "$S/dev/cxgbe/firmware/t6fw-1.16.12.0.bin.uu" \
dependency "$S/dev/cxgbe/firmware/t6fw-1.16.22.0.bin.uu" \
compile-with "${NORMAL_FW}" \
no-obj no-implicit-rule \
clean "t6fw.fw"

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@ -5801,10 +5801,9 @@ const char *t4_get_port_type_description(enum fw_port_type port_type)
"KR4_100G",
"CR4_QSFP",
"CR_QSFP",
"CR_SFP28",
"CR2_QSFP",
"SFP28",
"KR_SFP28",
"CR2_QSFP",
};
if (port_type < ARRAY_SIZE(port_type_description))

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File diff suppressed because it is too large Load Diff

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@ -6790,46 +6790,13 @@ enum fw_port_cap {
FW_PORT_CAP_ANEG = 0x0100,
FW_PORT_CAP_MDIX = 0x0200,
FW_PORT_CAP_MDIAUTO = 0x0400,
FW_PORT_CAP_FEC = 0x0800,
FW_PORT_CAP_TECHKR = 0x1000,
FW_PORT_CAP_TECHKX4 = 0x2000,
FW_PORT_CAP_FEC_RS = 0x0800,
FW_PORT_CAP_FEC_BASER_RS = 0x1000,
FW_PORT_CAP_FEC_RESERVED = 0x2000,
FW_PORT_CAP_802_3_PAUSE = 0x4000,
FW_PORT_CAP_802_3_ASM_DIR = 0x8000,
};
#define S_FW_PORT_AUXLINFO_MDI 3
#define M_FW_PORT_AUXLINFO_MDI 0x3
#define V_FW_PORT_AUXLINFO_MDI(x) ((x) << S_FW_PORT_AUXLINFO_MDI)
#define G_FW_PORT_AUXLINFO_MDI(x) \
(((x) >> S_FW_PORT_AUXLINFO_MDI) & M_FW_PORT_AUXLINFO_MDI)
#define S_FW_PORT_AUXLINFO_KX4 2
#define M_FW_PORT_AUXLINFO_KX4 0x1
#define V_FW_PORT_AUXLINFO_KX4(x) ((x) << S_FW_PORT_AUXLINFO_KX4)
#define G_FW_PORT_AUXLINFO_KX4(x) \
(((x) >> S_FW_PORT_AUXLINFO_KX4) & M_FW_PORT_AUXLINFO_KX4)
#define F_FW_PORT_AUXLINFO_KX4 V_FW_PORT_AUXLINFO_KX4(1U)
#define S_FW_PORT_AUXLINFO_KR 1
#define M_FW_PORT_AUXLINFO_KR 0x1
#define V_FW_PORT_AUXLINFO_KR(x) ((x) << S_FW_PORT_AUXLINFO_KR)
#define G_FW_PORT_AUXLINFO_KR(x) \
(((x) >> S_FW_PORT_AUXLINFO_KR) & M_FW_PORT_AUXLINFO_KR)
#define F_FW_PORT_AUXLINFO_KR V_FW_PORT_AUXLINFO_KR(1U)
#define S_FW_PORT_AUXLINFO_FEC 0
#define M_FW_PORT_AUXLINFO_FEC 0x1
#define V_FW_PORT_AUXLINFO_FEC(x) ((x) << S_FW_PORT_AUXLINFO_FEC)
#define G_FW_PORT_AUXLINFO_FEC(x) \
(((x) >> S_FW_PORT_AUXLINFO_FEC) & M_FW_PORT_AUXLINFO_FEC)
#define F_FW_PORT_AUXLINFO_FEC V_FW_PORT_AUXLINFO_FEC(1U)
#define S_FW_PORT_RCAP_AUX 11
#define M_FW_PORT_RCAP_AUX 0x7
#define V_FW_PORT_RCAP_AUX(x) ((x) << S_FW_PORT_RCAP_AUX)
#define G_FW_PORT_RCAP_AUX(x) \
(((x) >> S_FW_PORT_RCAP_AUX) & M_FW_PORT_RCAP_AUX)
#define S_FW_PORT_CAP_SPEED 0
#define M_FW_PORT_CAP_SPEED 0x3f
#define V_FW_PORT_CAP_SPEED(x) ((x) << S_FW_PORT_CAP_SPEED)
@ -6848,6 +6815,12 @@ enum fw_port_cap {
#define G_FW_PORT_CAP_ANEG(x) \
(((x) >> S_FW_PORT_CAP_ANEG) & M_FW_PORT_CAP_ANEG)
#define S_FW_PORT_CAP_FEC 11
#define M_FW_PORT_CAP_FEC 0x7
#define V_FW_PORT_CAP_FEC(x) ((x) << S_FW_PORT_CAP_FEC)
#define G_FW_PORT_CAP_FEC(x) \
(((x) >> S_FW_PORT_CAP_FEC) & M_FW_PORT_CAP_FEC)
#define S_FW_PORT_CAP_802_3 14
#define M_FW_PORT_CAP_802_3 0x3
#define V_FW_PORT_CAP_802_3(x) ((x) << S_FW_PORT_CAP_802_3)
@ -6866,6 +6839,22 @@ enum fw_port_mdi {
#define V_FW_PORT_CAP_MDI(x) ((x) << S_FW_PORT_CAP_MDI)
#define G_FW_PORT_CAP_MDI(x) (((x) >> S_FW_PORT_CAP_MDI) & M_FW_PORT_CAP_MDI)
#define S_FW_PORT_AUXLINFO_KX4 2
#define M_FW_PORT_AUXLINFO_KX4 0x1
#define V_FW_PORT_AUXLINFO_KX4(x) \
((x) << S_FW_PORT_AUXLINFO_KX4)
#define G_FW_PORT_AUXLINFO_KX4(x) \
(((x) >> S_FW_PORT_AUXLINFO_KX4) & M_FW_PORT_AUXLINFO_KX4)
#define F_FW_PORT_AUXLINFO_KX4 V_FW_PORT_AUXLINFO_KX4(1U)
#define S_FW_PORT_AUXLINFO_KR 1
#define M_FW_PORT_AUXLINFO_KR 0x1
#define V_FW_PORT_AUXLINFO_KR(x) \
((x) << S_FW_PORT_AUXLINFO_KR)
#define G_FW_PORT_AUXLINFO_KR(x) \
(((x) >> S_FW_PORT_AUXLINFO_KR) & M_FW_PORT_AUXLINFO_KR)
#define F_FW_PORT_AUXLINFO_KR V_FW_PORT_AUXLINFO_KR(1U)
enum fw_port_action {
FW_PORT_ACTION_L1_CFG = 0x0001,
FW_PORT_ACTION_L2_CFG = 0x0002,
@ -7255,10 +7244,9 @@ enum fw_port_type {
FW_PORT_TYPE_KR4_100G = 16, /* No, 4, 100G, Backplane */
FW_PORT_TYPE_CR4_QSFP = 17, /* No, 4, 100G */
FW_PORT_TYPE_CR_QSFP = 18, /* No, 1, 25G Spider cable */
FW_PORT_TYPE_CR_SFP28 = 19, /* No, 1, 25G - Old vpd */
FW_PORT_TYPE_SFP28 = 20, /* No, 1, 25G - New vpd */
FW_PORT_TYPE_CR2_QSFP = 19, /* No, 2, 50G */
FW_PORT_TYPE_SFP28 = 20, /* No, 1, 25G */
FW_PORT_TYPE_KR_SFP28 = 21, /* No, 1, 25G using Backplane */
FW_PORT_TYPE_CR2_QSFP = 22, /* No, 2, 50G */
FW_PORT_TYPE_NONE = M_FW_PORT_CMD_PTYPE
};
@ -9320,17 +9308,17 @@ enum fw_hdr_chip {
enum {
T4FW_VERSION_MAJOR = 0x01,
T4FW_VERSION_MINOR = 0x10,
T4FW_VERSION_MICRO = 0x0c,
T4FW_VERSION_MICRO = 0x16,
T4FW_VERSION_BUILD = 0x00,
T5FW_VERSION_MAJOR = 0x01,
T5FW_VERSION_MINOR = 0x10,
T5FW_VERSION_MICRO = 0x0c,
T5FW_VERSION_MICRO = 0x16,
T5FW_VERSION_BUILD = 0x00,
T6FW_VERSION_MAJOR = 0x01,
T6FW_VERSION_MINOR = 0x10,
T6FW_VERSION_MICRO = 0x0c,
T6FW_VERSION_MICRO = 0x16,
T6FW_VERSION_BUILD = 0x00,
};

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@ -409,6 +409,7 @@
tp_ddp = 2
tp_ddp_iscsi = 2
tp_tls_key = 3
tp_tls_mxrxsize = 17408 # 16384 + 1024, governs max rx data, pm max xfer len, rx coalesce sizes
tp_stag = 2
tp_pbl = 5
tp_rq = 7
@ -551,7 +552,9 @@
dcb_app_tlv[0] = 0x8906, ethertype, 3
dcb_app_tlv[1] = 0x8914, ethertype, 3
dcb_app_tlv[2] = 3260, socketnum, 5
aec_retry_cnt = 4
#aec_retry_cnt = 4
flags = an_dis
fec = none # FEC type none/rs/firecode
[port "1"]
@ -564,12 +567,14 @@
dcb_app_tlv[0] = 0x8906, ethertype, 3
dcb_app_tlv[1] = 0x8914, ethertype, 3
dcb_app_tlv[2] = 3260, socketnum, 5
aec_retry_cnt = 4
#aec_retry_cnt = 4
flags = an_dis
fec = none # FEC type none/rs/firecode
[fini]
version = 0x01000023
checksum = 0x683208a2
version = 0x01000024
checksum = 0x36cebfcb
# Total resources used by above allocations:
# Virtual Interfaces: 104

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@ -409,6 +409,7 @@
tp_ddp = 2
tp_ddp_iscsi = 2
tp_tls_key = 3
tp_tls_mxrxsize = 17408 # 16384 + 1024, governs max rx data, pm max xfer len, rx coalesce sizes
tp_stag = 2
tp_pbl = 5
tp_rq = 7
@ -551,7 +552,9 @@
dcb_app_tlv[0] = 0x8906, ethertype, 3
dcb_app_tlv[1] = 0x8914, ethertype, 3
dcb_app_tlv[2] = 3260, socketnum, 5
aec_retry_cnt = 4
#aec_retry_cnt = 4
flags = an_dis
fec = none # FEC type none/rs/firecode
[port "1"]
@ -564,12 +567,14 @@
dcb_app_tlv[0] = 0x8906, ethertype, 3
dcb_app_tlv[1] = 0x8914, ethertype, 3
dcb_app_tlv[2] = 3260, socketnum, 5
aec_retry_cnt = 4
#aec_retry_cnt = 4
flags = an_dis
fec = none # FEC type none/rs/firecode
[fini]
version = 0x01000023
checksum = 0x683208a2
version = 0x01000024
checksum = 0x36cebfcb
# Total resources used by above allocations:
# Virtual Interfaces: 104

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@ -3590,7 +3590,6 @@ build_medialist(struct port_info *pi, struct ifmedia *media)
break;
case FW_PORT_TYPE_CR_QSFP:
case FW_PORT_TYPE_CR_SFP28:
case FW_PORT_TYPE_SFP28:
case FW_PORT_TYPE_KR_SFP28:
switch (pi->mod_type) {

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@ -17,7 +17,7 @@ FIRMWS+= ${F}:${F:C/.txt//}:1.0.0.0
.endif
.endfor
T4FW_VER= 1.16.12.0
T4FW_VER= 1.16.22.0
FIRMWS+= t4fw.fw:t4fw:${T4FW_VER}
CLEANFILES+= t4fw.fw

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@ -17,7 +17,7 @@ FIRMWS+= ${F}:${F:C/.txt//}:1.0.0.0
.endif
.endfor
T5FW_VER= 1.16.12.0
T5FW_VER= 1.16.22.0
FIRMWS+= t5fw.fw:t5fw:${T5FW_VER}
CLEANFILES+= t5fw.fw

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@ -17,7 +17,7 @@ FIRMWS+= ${F}:${F:C/.txt//}:1.0.0.0
.endif
.endfor
T6FW_VER= 1.16.12.0
T6FW_VER= 1.16.22.0
FIRMWS+= t6fw.fw:t6fw:${T6FW_VER}
CLEANFILES+= t6fw.fw