Cleanup.
This commit is contained in:
fsmp
parent
2cd754efcd
commit
3ccd0ce0a7
@ -1,6 +1,6 @@
|
||||
/*
|
||||
* from: vector.s, 386BSD 0.1 unknown origin
|
||||
* $Id: apic_vector.s,v 1.10 1997/07/15 00:08:01 smp Exp smp $
|
||||
* $Id: apic_vector.s,v 1.7 1997/07/15 02:49:21 fsmp Exp $
|
||||
*/
|
||||
|
||||
|
||||
@ -240,22 +240,22 @@ _Xcpustop:
|
||||
incl _cshits(,%eax,4)
|
||||
#endif /* COUNT_CSHITS */
|
||||
|
||||
ASMPOSTCODE_HI(0x10)
|
||||
ASMPOSTCODE_HI(0x1)
|
||||
|
||||
lock
|
||||
btsl %eax, _stopped_cpus /* stopped_cpus |= (1<<id) */
|
||||
|
||||
ASMPOSTCODE_HI(0x20);
|
||||
ASMPOSTCODE_HI(0x2);
|
||||
1:
|
||||
btl %eax, _started_cpus /* while (!(started_cpus & (1<<id))) */
|
||||
jnc 1b
|
||||
|
||||
ASMPOSTCODE_HI(0x30)
|
||||
ASMPOSTCODE_HI(0x3)
|
||||
|
||||
lock
|
||||
btrl %eax, _started_cpus /* started_cpus &= ~(1<<id) */
|
||||
|
||||
ASMPOSTCODE_HI(0x40)
|
||||
ASMPOSTCODE_HI(0x4)
|
||||
|
||||
movl $0, lapic_eoi /* End Of Interrupt to APIC */
|
||||
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
/*
|
||||
* from: vector.s, 386BSD 0.1 unknown origin
|
||||
* $Id: apic_vector.s,v 1.10 1997/07/15 00:08:01 smp Exp smp $
|
||||
* $Id: apic_vector.s,v 1.7 1997/07/15 02:49:21 fsmp Exp $
|
||||
*/
|
||||
|
||||
|
||||
@ -240,22 +240,22 @@ _Xcpustop:
|
||||
incl _cshits(,%eax,4)
|
||||
#endif /* COUNT_CSHITS */
|
||||
|
||||
ASMPOSTCODE_HI(0x10)
|
||||
ASMPOSTCODE_HI(0x1)
|
||||
|
||||
lock
|
||||
btsl %eax, _stopped_cpus /* stopped_cpus |= (1<<id) */
|
||||
|
||||
ASMPOSTCODE_HI(0x20);
|
||||
ASMPOSTCODE_HI(0x2);
|
||||
1:
|
||||
btl %eax, _started_cpus /* while (!(started_cpus & (1<<id))) */
|
||||
jnc 1b
|
||||
|
||||
ASMPOSTCODE_HI(0x30)
|
||||
ASMPOSTCODE_HI(0x3)
|
||||
|
||||
lock
|
||||
btrl %eax, _started_cpus /* started_cpus &= ~(1<<id) */
|
||||
|
||||
ASMPOSTCODE_HI(0x40)
|
||||
ASMPOSTCODE_HI(0x4)
|
||||
|
||||
movl $0, lapic_eoi /* End Of Interrupt to APIC */
|
||||
|
||||
|
||||
@ -33,61 +33,12 @@
|
||||
* various 'tests in progress'
|
||||
*/
|
||||
|
||||
|
||||
/*
|
||||
* address of POST hardware port
|
||||
*
|
||||
*/
|
||||
#define POST_ADDR 0x80
|
||||
#ifdef POST_ADDR
|
||||
#define ASMPOSTCODE_INC \
|
||||
pushl %eax ; \
|
||||
movl _current_postcode, %eax ; \
|
||||
incl %eax ; \
|
||||
andl $0xff, %eax ; \
|
||||
movl %eax, _current_postcode ; \
|
||||
outb %al, $POST_ADDR ; \
|
||||
popl %eax
|
||||
|
||||
/*
|
||||
* Overwrite the current_postcode low nibble .
|
||||
*/
|
||||
#define ASMPOSTCODE_HILO(X) \
|
||||
pushl %eax ; \
|
||||
movl $X, %eax ; \
|
||||
movl %eax, _current_postcode ; \
|
||||
outb %al, $POST_ADDR ; \
|
||||
popl %eax
|
||||
|
||||
/*
|
||||
* Overwrite the current_postcode low nibble .
|
||||
*/
|
||||
#define ASMPOSTCODE_LO(X) \
|
||||
pushl %eax ; \
|
||||
movl _current_postcode, %eax ; \
|
||||
andl $0xf0, %eax ; \
|
||||
orl $X, %eax ; \
|
||||
movl %eax, _current_postcode ; \
|
||||
outb %al, $POST_ADDR ; \
|
||||
popl %eax
|
||||
|
||||
/*
|
||||
* Overwrite the current_postcode high nibble .
|
||||
* Note: this does NOT shift the digit to the high position!
|
||||
*/
|
||||
#define ASMPOSTCODE_HI(X) \
|
||||
pushl %eax ; \
|
||||
movl _current_postcode, %eax ; \
|
||||
andl $0x0f, %eax ; \
|
||||
orl $X, %eax ; \
|
||||
movl %eax, _current_postcode ; \
|
||||
outb %al, $POST_ADDR ; \
|
||||
popl %eax
|
||||
#else
|
||||
#define ASMPOSTCODE_INC
|
||||
#define ASMPOSTCODE_HILO(X)
|
||||
#define ASMPOSTCODE_LO(X)
|
||||
#define ASMPOSTCODE_HI(X)
|
||||
#endif /* POST_ADDR */
|
||||
|
||||
|
||||
/*
|
||||
@ -160,6 +111,61 @@
|
||||
#define IPI_TARGET_TEST1 1
|
||||
*/
|
||||
|
||||
|
||||
/*
|
||||
* POST hardware macros.
|
||||
*/
|
||||
#ifdef POST_ADDR
|
||||
#define ASMPOSTCODE_INC \
|
||||
pushl %eax ; \
|
||||
movl _current_postcode, %eax ; \
|
||||
incl %eax ; \
|
||||
andl $0xff, %eax ; \
|
||||
movl %eax, _current_postcode ; \
|
||||
outb %al, $POST_ADDR ; \
|
||||
popl %eax
|
||||
|
||||
/*
|
||||
* Overwrite the current_postcode value.
|
||||
*/
|
||||
#define ASMPOSTCODE(X) \
|
||||
pushl %eax ; \
|
||||
movl $X, %eax ; \
|
||||
movl %eax, _current_postcode ; \
|
||||
outb %al, $POST_ADDR ; \
|
||||
popl %eax
|
||||
|
||||
/*
|
||||
* Overwrite the current_postcode low nibble.
|
||||
*/
|
||||
#define ASMPOSTCODE_LO(X) \
|
||||
pushl %eax ; \
|
||||
movl _current_postcode, %eax ; \
|
||||
andl $0xf0, %eax ; \
|
||||
orl $X, %eax ; \
|
||||
movl %eax, _current_postcode ; \
|
||||
outb %al, $POST_ADDR ; \
|
||||
popl %eax
|
||||
|
||||
/*
|
||||
* Overwrite the current_postcode high nibble.
|
||||
*/
|
||||
#define ASMPOSTCODE_HI(X) \
|
||||
pushl %eax ; \
|
||||
movl _current_postcode, %eax ; \
|
||||
andl $0x0f, %eax ; \
|
||||
orl $(X<<4), %eax ; \
|
||||
movl %eax, _current_postcode ; \
|
||||
outb %al, $POST_ADDR ; \
|
||||
popl %eax
|
||||
#else
|
||||
#define ASMPOSTCODE_INC
|
||||
#define ASMPOSTCODE(X)
|
||||
#define ASMPOSTCODE_LO(X)
|
||||
#define ASMPOSTCODE_HI(X)
|
||||
#endif /* POST_ADDR */
|
||||
|
||||
|
||||
/*
|
||||
* these are all temps for debugging CPUSTOP code in mplock.s
|
||||
* they will (hopefully) go away soon...
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
/*
|
||||
* from: vector.s, 386BSD 0.1 unknown origin
|
||||
* $Id: apic_vector.s,v 1.10 1997/07/15 00:08:01 smp Exp smp $
|
||||
* $Id: apic_vector.s,v 1.7 1997/07/15 02:49:21 fsmp Exp $
|
||||
*/
|
||||
|
||||
|
||||
@ -240,22 +240,22 @@ _Xcpustop:
|
||||
incl _cshits(,%eax,4)
|
||||
#endif /* COUNT_CSHITS */
|
||||
|
||||
ASMPOSTCODE_HI(0x10)
|
||||
ASMPOSTCODE_HI(0x1)
|
||||
|
||||
lock
|
||||
btsl %eax, _stopped_cpus /* stopped_cpus |= (1<<id) */
|
||||
|
||||
ASMPOSTCODE_HI(0x20);
|
||||
ASMPOSTCODE_HI(0x2);
|
||||
1:
|
||||
btl %eax, _started_cpus /* while (!(started_cpus & (1<<id))) */
|
||||
jnc 1b
|
||||
|
||||
ASMPOSTCODE_HI(0x30)
|
||||
ASMPOSTCODE_HI(0x3)
|
||||
|
||||
lock
|
||||
btrl %eax, _started_cpus /* started_cpus &= ~(1<<id) */
|
||||
|
||||
ASMPOSTCODE_HI(0x40)
|
||||
ASMPOSTCODE_HI(0x4)
|
||||
|
||||
movl $0, lapic_eoi /* End Of Interrupt to APIC */
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user