Allow guest writes to AMD microcode update[0xc0010020] MSR without updating actual hardware MSR. This allows guest microcode update to go through which otherwise failing because wrmsr() was returning EINVAL.

Submitted by:Yamagi Burmeister
Approved by:grehan
MFC after:2 weeks

sys/amd64/vmm/amd/svm_msr.c

@@ -156,6 +156,11 @@ svm_wrmsr(struct svm_softc *sc, int vcpu, u_int num, uint64_t val, bool *retu)
 		 * Ignore writes to the "Interrupt Pending Message" MSR.
 		 */
 		break;
+	case MSR_K8_UCODE_UPDATE:
+		/*
+		 * Ignore writes to microcode update register.
+		 */
+		break;
 	default:
 		error = EINVAL;
 		break;